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radv: don't lower_vars_to_ssa during optimization loop

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Totals from 138 (0.17% of 79839) affected shaders: (Navi48)

Instrs: 129058 -> 128913 (-0.11%); split: -0.20%, +0.09%
CodeSize: 683024 -> 682056 (-0.14%); split: -0.20%, +0.06%
Latency: 1080293 -> 1080517 (+0.02%); split: -0.02%, +0.04%
InvThroughput: 180598 -> 180622 (+0.01%)
SClause: 2292 -> 2294 (+0.09%); split: -0.13%, +0.22%
Copies: 8663 -> 8721 (+0.67%); split: -2.27%, +2.94%
PreSGPRs: 5980 -> 5953 (-0.45%)
VALU: 78673 -> 78686 (+0.02%); split: -0.01%, +0.02%
SALU: 13933 -> 13860 (-0.52%); split: -1.41%, +0.89%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38367>
This commit is contained in:
Daniel Schürmann 2025-11-10 14:23:48 +01:00 • committed by Marge Bot
parent d959e17d3d
commit 18b99338b7
2 changed files with 7 additions and 4 deletions
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1
src/amd/vulkan/radv_pipeline_graphics.c
View file

@ -2841,6 +2841,7 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac
}
NIR_PASS(_, stages[MESA_SHADER_GEOMETRY].nir, nir_lower_gs_intrinsics, nir_gs_flags);
NIR_PASS(_, stages[MESA_SHADER_GEOMETRY].nir, nir_lower_vars_to_ssa);
}
/* Remove all varyings when the fragment shader is a noop. */

10
src/amd/vulkan/radv_shader.c
View file

@ -171,7 +171,6 @@ radv_optimize_nir(struct nir_shader *shader, bool optimize_conservatively)
NIR_LOOP_PASS(progress, skip, shader, nir_split_array_vars, nir_var_function_temp);
NIR_LOOP_PASS(progress, skip, shader, nir_shrink_vec_array_vars, nir_var_function_temp | nir_var_mem_shared);
NIR_LOOP_PASS(progress, skip, shader, nir_opt_copy_prop_vars);
NIR_LOOP_PASS(_, skip, shader, nir_lower_vars_to_ssa);
NIR_LOOP_PASS(_, skip, shader, nir_lower_alu_width, vectorize_vec2_16bit, NULL);
NIR_LOOP_PASS(_, skip, shader, nir_lower_phis_to_scalar, ac_nir_lower_phis_to_scalar_cb, NULL);
@ -666,8 +665,6 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
NIR_PASS(_, nir, nir_lower_image, &image_options);
NIR_PASS(_, nir, nir_lower_vars_to_ssa);
if (nir->info.stage == MESA_SHADER_VERTEX || nir->info.stage == MESA_SHADER_GEOMETRY ||
nir->info.stage == MESA_SHADER_FRAGMENT) {
NIR_PASS(_, nir, nir_lower_io_vars_to_temporaries, nir_shader_get_entrypoint(nir), true, true);
@ -719,6 +716,7 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
* so that we don't introduce any new copy_deref instructions later.
*/
NIR_PASS(_, nir, nir_opt_find_array_copies);
NIR_PASS(_, nir, nir_lower_vars_to_ssa);
radv_optimize_nir(nir, false);
@ -784,7 +782,11 @@ radv_shader_spirv_to_nir(struct radv_device *device, const struct radv_shader_st
* bloat the instruction count of the loop and cause it to be
* considered too large for unrolling.
*/
if (ac_nir_lower_indirect_derefs(nir, pdev->info.gfx_level) && !stage->key.optimisations_disabled &&
bool indirect_derefs_lowered = false;
NIR_PASS(indirect_derefs_lowered, nir, ac_nir_lower_indirect_derefs, pdev->info.gfx_level);
NIR_PASS(_, nir, nir_lower_vars_to_ssa);
if (indirect_derefs_lowered && !stage->key.optimisations_disabled &&
nir->info.stage != MESA_SHADER_COMPUTE) {
/* Optimize the lowered code before the linking optimizations. */
radv_optimize_nir(nir, false);