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Author SHA1 Message Date
Rhys Perry
a8a15dc5b5 aco: add struct and helpers for exec potentially empty 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30320>
 2024-07-26 11:08:27 +00:00
Rhys Perry
39264a90c3 aco: consider exec empty after divergent continue then divergent break 
For:
loop {
   if (divergent)
      continue
   if (divergent)
      break
   //exec is potentially empty here
   loop {
      if (divergent)
         break
   }
}
If a subset of invocations take the continue and then the rest take the
break, then exec will be empty after the break.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30320>
 2024-07-26 11:08:27 +00:00
Georg Lehmann
97aa3464b9 radv/rt: remove one VALU from traversal loop 
Not much, but something, I guess?

Foz-DB Navi31:
Totals from 93 (0.12% of 79395) affected shaders:
MaxWaves: 1338 -> 1354 (+1.20%)
Instrs: 3689907 -> 3689721 (-0.01%); split: -0.01%, +0.00%
CodeSize: 18921812 -> 18922920 (+0.01%); split: -0.00%, +0.01%
VGPRs: 9012 -> 8988 (-0.27%)
Latency: 23153748 -> 23167640 (+0.06%)
InvThroughput: 4490882 -> 4493136 (+0.05%)
Copies: 287888 -> 287728 (-0.06%)
VALU: 2022082 -> 2021916 (-0.01%)
SALU: 458904 -> 459064 (+0.03%)

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30342>
 2024-07-25 20:24:23 +00:00
David Rosca
8b1a889e45 radeonsi/vcn: Add support for QVBR rate control mode 
This rate control mode needs pre-encode enabled and currently is
supported for VCN3 and VCN4.
AV1 needs quality level scaled down from 255 to 51 range.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4024
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30221>
 2024-07-24 20:18:49 +00:00
Ruijing Dong
8a5ef9413b radeonsi/vcn: add HDR metadata obu in av1enc 
Enable HDR metadata obu in av1 encoder for
both vcn4/5.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
 2024-07-23 17:16:21 +00:00
Ruijing Dong
aa86c3a235 radeonsi/vcn: input av1 hdr metadata 
get av1 hdr metadata from frontends.

Reviewed-by: David Rosca <david.rosca@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30237>
 2024-07-23 17:16:21 +00:00
Marek Olšák
d90080b51b nir/opt_vectorize_io: optionally don't vectorize IO with different types 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11443

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:17 +00:00
Marek Olšák
07ef1a8124 ac,radeonsi: set 16-bit flags in io_options optimally 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:17 +00:00
Marek Olšák
709ebd8293 amd: expose nir_io_mix_convergent_flat_with_interpolated 
The drivers need to invert how they gather flat inputs.

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:17 +00:00
Marek Olšák
b2d32ae246 nir: add nir_intrinsic_load_per_primitive_input, split from io_semantics flag 
Instead of having 1 bit in nir_io_semantics indicating a per-primitive
FS input, add a dedicated intrinsic for it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29895>
 2024-07-23 16:13:16 +00:00
Ganesh Belgur Ramachandra
ec4e5ef0f7 amd/common: skip lane size determination for chips without image opcodes (e.g. gfx940) 
This fixes VAAPI decode performance issues.

Fixes: 5b3e1a0532 ("radeonsi: change the compute blit to clear/blit multiple pixels per lane")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30273>
 2024-07-23 14:50:37 +00:00
Rhys Perry
cccfbe6141 aco: move s_setprio to before NGG exec initialization 
fossil-db (gfx1150):
Totals from 32 (0.04% of 79395) affected shaders:
Instrs: 17397 -> 17365 (-0.18%)
CodeSize: 83700 -> 83580 (-0.14%)
Latency: 59006 -> 58974 (-0.05%)

fossil-db (navi21):
Totals from 4 (0.01% of 79395) affected shaders:

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
4574cd9fae aco: form export clauses 
This is useful for the export priority workaround. It also moves
copy/conversion instructions up from in-between exports.

fossil-db (gfx1150):
Totals from 9974 (12.56% of 79395) affected shaders:
Instrs: 7038168 -> 6949186 (-1.26%)
CodeSize: 37988148 -> 37632220 (-0.94%)
Latency: 44759046 -> 44324922 (-0.97%); split: -0.97%, +0.00%
InvThroughput: 8213681 -> 8201222 (-0.15%); split: -0.15%, +0.00%

fossil-db (navi21):
Totals from 16785 (21.14% of 79395) affected shaders:
Instrs: 9282414 -> 9282302 (-0.00%)
CodeSize: 50252480 -> 50252032 (-0.00%)
Latency: 59716988 -> 59610334 (-0.18%); split: -0.18%, +0.00%
InvThroughput: 12681965 -> 12680380 (-0.01%); split: -0.01%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
08a4853ffd aco: add export instructions to should_form_clause 
fossil-db (gfx1150):
Totals from 1 (0.00% of 79395) affected shaders:
Instrs: 906 -> 901 (-0.55%)
CodeSize: 4692 -> 4672 (-0.43%)
Latency: 1582 -> 1561 (-1.33%)

fossil-db (navi21):
Totals from 9917 (12.49% of 79395) affected shaders:
Instrs: 6120530 -> 6116252 (-0.07%)
CodeSize: 31808916 -> 31791804 (-0.05%)
Latency: 23854892 -> 23866438 (+0.05%); split: -0.01%, +0.06%
InvThroughput: 4655278 -> 4655490 (+0.00%); split: -0.00%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
3b732340ec aco/gfx11.5: skip dealloc_vgprs for stages with exports 
fossil-db (gfx1150):
Totals from 72997 (91.94% of 79395) affected shaders:
Instrs: 35047397 -> 34679136 (-1.05%)
CodeSize: 182414292 -> 180934440 (-0.81%)
Latency: 225452700 -> 225045411 (-0.18%)
InvThroughput: 40416910 -> 40395608 (-0.05%); split: -0.06%, +0.00%
Branches: 604968 -> 601660 (-0.55%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:52 +00:00
Rhys Perry
492d99fc6a aco: add tests for export priority issue 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:51 +00:00
Rhys Perry
0919ce1ac4 aco/gfx11.5: workaround export priority issue 
https://github.com/llvm/llvm-project/pull/99273

fossil-db (gfx1150):
Totals from 73996 (93.20% of 79395) affected shaders:
Instrs: 36015357 -> 36807177 (+2.20%)
CodeSize: 189072544 -> 192238748 (+1.67%)
Latency: 245845181 -> 246790550 (+0.38%); split: -0.00%, +0.38%
InvThroughput: 45068018 -> 45116177 (+0.11%); split: -0.00%, +0.11%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Backport-to: 24.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30241>
 2024-07-23 13:14:51 +00:00
Pierre-Eric Pelloux-Prayer
0c868aa94a amd: use a valid size for ac_pm4_state allocation 
If max_dw is smaller than the pm4 array the allocation size would be
smaller than sizeof(ac_pm4_state).

Fixes: 428601095c ("ac,radeonsi import PM4 state from RadeonSI")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30257>
 2024-07-22 10:09:34 +00:00
Eric Engestrom
e1edf20a4d radeonsi/ci: skip timing out test 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30264>
 2024-07-19 21:26:16 +00:00
Samuel Pitoiset
1846eed38b radv/meta: create the layout for clear depth/stencil on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
7c62f53b83 radv/meta: rework getting depth stencil clear pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
cfd9d550d8 radv/meta: create the layout for clear color on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
dd188b7e77 radv/meta: rework getting clear color pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
2af57b1cac radv/meta: create the louts for DCC comp-to-single clear on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
6c6dae59fb radv/meta: create the layouts for compute resolve on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
fd5526fd87 radv/meta: create the layouts for FMASK expand on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
4f3f3ccd0d radv/meta: create the layouts for FMASK copy on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
40724a657a radv/meta: create the layouts for depth decompress on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
e7eb201e18 radv/meta: create the layouts for FS resolve pipelines on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
fc30915637 radv/meta: create the layouts for blit pipelines on-demand 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
5361a50d54 radv/meta: stop creating similar pipeline layouts for depth decompress 
Only the pipeline depends on the number of samples.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
5b7459d0fa radv/meta: remove unnecessary goto 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Samuel Pitoiset
c96f2c5e3d radv/meta: stop checking that creating NIR shaders failed 
This shouldn't happen in practice.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30262>
 2024-07-19 14:53:44 +00:00
Daniel Stone
ccc6442d6f u_format: Rewrite format table to use YAML 
u_format has always had its format table in CSV. This is kind of nice
for some things, but is a serious pain to extend, especially with
optional fields.

In going through our many (many, many) duplicated tables of format
mappings, it would've been nice to add some descriptions to our central
u_format table, such as mapping to DRM FourCC, to EGLImage mappings, and
to GL internalformats for EGLImage imports. Unfortunately, doing so with
more additional fields would just make the CSV totally unreadable.

Move the CSV table to a YAML-based table and adjust the Python parsers
to suit. The resulting generated files are identical before and after
the transition.

The new parser also has a significant amount of format validation to
make it easier to catch common errors.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29649>
 2024-07-19 13:50:42 +00:00
Georg Lehmann
e5b48da908 aco: remove optimize_cmp_subgroup_invocation 
The new NIR optimization pass handles all these cases and more.
No Foz-DB changes.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30236>
 2024-07-19 08:06:58 +00:00
Georg Lehmann
efb9258814 aco: handle clustered uniform reductions correctly 
Alternatively we could just trust divergence analysis to do the right thing.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30235>
 2024-07-19 07:24:34 +00:00
Samuel Pitoiset
65acc81e9d radv: fix shaders cache corruption with indirect pipeline binds 
Indirect pipeline binds force indirect descriptor sets and this needs
to be in the shader stage key, otherwise two shaders might result in
the same pipeline cache key.

Fixes: b1ba02e707 ("radv: force using indirect descriptor sets for indirect compute pipelines")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30209>
 2024-07-19 06:52:21 +00:00
Samuel Pitoiset
3fba270907 radv/meta: create clear r32g32b32 pipelines on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
5933d2274b radv/meta: add a helper to create clear r32g32b32 pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
9a3f00e7e6 radv/meta: create clear pipeliones on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
7bda80f08b radv/meta: update the helper that creates clear pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
b406121d22 radv/meta: create itoi r32g32b32 pipelines on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
2e21c4098f radv/meta: add a helper to create itoi r32g32b32 pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
ef2af61300 radv/meta: create itoi pipelines on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
e47dffb100 radv/meta: update the helper that creates itoi pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
bb745776b7 radv/meta: create btoi r32g32b32 pipeline on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
010e2c373b radv/meta: add a helper to create btoi r32g32b32 pipeline 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
b68b9b1677 radv/meta create btoi pipelines on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
3332de3640 radv/meta: add a helper to create btoi pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00
Samuel Pitoiset
c23ec1a7c3 radv/meta: create itob pipelines on-demand when needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30248>
 2024-07-18 17:27:46 +02:00