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Author SHA1 Message Date
Georg Lehmann
34c3f81614 nir: unify lower_bitfield_insert with has_{bfm,bfi,bitfield_select} 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
 2023-08-22 12:08:37 +00:00
Friedrich Vock
bfb55d0266 ac/sqtt,radv/sqtt: Add and use marker for separate RT compilation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
3d3d5c4bc3 radv/sqtt: Handle separately-compiled RT pipelines 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
1cd9525b18 radv/sqtt: Write LDS size metadata in code objects 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
7809fb9e49 radv/sqtt: Unregister records based on hash 
RT pipelines have multiple hashes used in records, so don't always use
the pipeline hash.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
3ed4cca883 radv/sqtt: Move record filling to helper function 
RT shaders construct records differently, but this piece of code is
common to all types of pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
b4a704b42a ac/rgp: Add metadata for separate-compiled RT stages 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
0c4e92bf3e ac/rgp: Write lds_size metadata 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
be0e3e8e09 ac/sqtt,radv: Split internal and API hash in PSO correlations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:11 +00:00
Friedrich Vock
d5f1c9fb4b ac/msgpack: make fixstrs a const char 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
 2023-08-22 11:33:10 +00:00
Samuel Pitoiset
a29e2c6fbc aco: implement create_tcs_jump_to_epilog() 
This implements jumping from the main TCS to the epilog.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
e03c09dfb2 aco: allow SGPRs operands with p_jump_to_epilog 
For TCS epilogs, we will have to pass SGPRs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
fc9283938f aco: adjust TCS epilogs for RADV 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
0c2adc7ada aco: fix jumping from main TCS to epilog on GFX9+ 
On GFX9+, VS is merged with TCS which means this function is called
twice and the epilog was emitted in both shader parts.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
131c3aa3dc radv: add tcs_out_patch_fits_subgroup to radv_tcs_epilog_key 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
65191bb351 radv: declare shader arguments for TCS epilogs 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
d0808b22cb radv: stop declaring the scratch offset argument for TCS epilogs 
ACO skip it for epilogs now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Samuel Pitoiset
6ad8abf7aa radv: use the maximum possible workgroup size for TCS epilogs 
It's similar to when the patch control points value is dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24643>
 2023-08-22 06:10:32 +00:00
Chia-I Wu
e74c3dbb70 ac/surface: limit RADEON_SURF_NO_TEXTURE to color surfaces 
For z surfaces, flags.texture should be based on
RADEON_SURF_TC_COMPATIBLE_HTILE alone.  Otherwise, addrlib could pick a
_X/_T swizzle mode for a MSAA depth texture, which is said to be broken:

  When _X/_T swizzle mode was used for MSAA depth texture, TC will get zplane
  equation from wrong address within memory range a tile covered and use the
  garbage data for compressed Z reading which finally leads to corruption.

Fixes: de0885cdb8 ("amd/surface: add RADEON_SURF_NO_TEXTURE flag")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24767>
 2023-08-22 02:36:20 +00:00
David Heidelberg
6079c3ca49 ci: disable Material Testers.x86_64_2020.04.08_13.38_frame799.rdc trace 
This change will be revert as soon, as Collabora proxy gets fixed.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24819>
 2023-08-21 22:31:21 +00:00
Tatsuyuki Ishi
6c5512568b radv/amdgpu: Do not pass in a BO handle when clearing PRT VA region. 
This field is invalid to access for virtual BOs.

Fixes: a931d5a4a4 ("radv/winsys: clear the PRT VA range when destroying a virtual BO")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24805>
 2023-08-21 17:24:35 +00:00
Konstantin Seurer
2943bc34e9 radv: Remove leaf_args::dst_offset 
We can use first_id instead.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24756>
 2023-08-21 12:45:06 +00:00
Konstantin Seurer
90a24c7cb3 radv: Add internal_nodes_offset to scratch_layout 
It shouldn't be a part of bvh_state.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24756>
 2023-08-21 12:45:06 +00:00
Samuel Pitoiset
b8b42be555 radv/amdgpu: add support for submitting external IBs with the chained path 
External IBs are currently only used for DGC. With the chained path,
these IBs will only be used to workaround missing IB2 packet on the
compute queue, which is rare enough to care about chaining inside CS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24207>
 2023-08-21 10:52:13 +00:00
Samuel Pitoiset
33f584f033 radv/amdgpu: allow to execute external IBs on the compute queue 
IB2 isn't supported on ACE, so external IBs should be submitted as IB1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24207>
 2023-08-21 10:52:13 +00:00
Samuel Pitoiset
e3fae01730 Revert "radv/amdgpu: skip adding per VM BOs for sparse during CS BO list build" 
This reverts commit 51caece74c.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
 2023-08-21 09:42:51 +00:00
Samuel Pitoiset
f67eb9ce07 Revert "radv/amdgpu: workaround a kernel bug when replacing sparse mappings" 
This workaround was added temporarily but it can actually cause
stuttering in some games like Forza Horizon 5.

The kernel fix
(https://lists.freedesktop.org/archives/amd-gfx/2023-June/094648.html)
landed in some stable kernels (5.15.121+, 6.1.40+ and 6.4.5+). Sadly,
older stable kernels don't have it, so you might experiment random GPU
hangs in games that use sparse mapping. Please ensure your kernel is
up-to-date for the best experience.

This reverts commit 9b00867327.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9443
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24774>
 2023-08-21 09:42:51 +00:00
Marek Olšák
905a00f10a ac/surface: add radeon_surf::u::gfx9::uses_custom_pitch 
so that we don't try to guess when the pitch is overridden

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:56 +00:00
Marek Olšák
9eb00f612a ac/surface: trivial non-functional changes 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:56 +00:00
Marek Olšák
40b426c8f9 ac: add a standalone IB parser program 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:56 +00:00
Marek Olšák
229833d118 ac: update gfx11 shadowed register tables 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
176ef72ff5 ac: improve the IB parser 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
05e7bf471c ac: change offsets of DMA_DATA dwords to prevent reg offset conflicts 
Use non-multiples of 4.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
8e4ba537a1 ac: minor updates to packet documentation and definitions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
bc44121444 ac: document ac_shader_args::gs_vtx_offset 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
a2bf30961f ac: implement AMD_FORCE_FAMILY properly, remove SI_FORCE_FAMILY 
This sets radeon_info for the forced family correctly.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
5d19a0a19b Revert "ac: don't call ac_query_pci_bus_info from ac_query_gpu_info" 
This reverts commit a48642400b.

Instead, add a new parameter require_pci_bus_info to control the behavior.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Marek Olšák
b02b43eef1 ac/gpu_info: add the /dev/dri/ filename into radeon_info 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
 2023-08-19 19:36:55 +00:00
Flora Cui
e259f4050d radeonsi: limit CP DMA to skip holes in sparse bo 
CP DMA on gfx9 can't handle the hole in sparse buffer. The fix skip
sparse bo hole so that arb_sparse_buffer-buffer-data &&
arb_sparse_buffer-commit pass

Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24535>
 2023-08-18 15:42:20 +00:00
Samuel Pitoiset
b78ea2a38f radv: stop copying if VS or TES uses the InvocationID built-in 
It's only allowed in TCS or GS which means the src shader stage
value is always FALSE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
d547c996ae radv: simplify declaring VS specific input SGPRs 
stage/previous_stage are actually useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
525143d01a radv: remove unused param from radv_pipeline_init_multisample_state() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
1cf840fb3e radv: remove radv_cmd_buffer::cached_vertex_formats 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24770>
 2023-08-18 10:23:45 +02:00
Samuel Pitoiset
c136169062 radv: fix emitting TCS epilogs for GFX6-9 
The number of SGPRs need to be adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24747>
 2023-08-18 07:52:22 +00:00
Samuel Pitoiset
f9a9471caf radv: add missing comment about TCS_OFFCHIP_LAYOUT_LSHS_VERTEX_STRIDE 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24745>
 2023-08-18 07:11:26 +00:00
Samuel Pitoiset
c6a56e6b3d radv: reduce TCS_OFFCHIP_LAYOUT_NUM_PATCHES to 6-bits 
RADV clamps the number of tess patches to 40.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24745>
 2023-08-18 07:11:26 +00:00
Faith Ekstrand
b5d6b7c402 nir: Drop most uses if nir_instr_rewrite_src() 
Generated by the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src(I, S, nir_src_for_ssa(D));
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
71ddaca2e2 nir: Drop nir_instr_rewrite_src_ssa() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
de063a1481 nir: Drop most uses of nir_instr_rewrite_src_ssa() 
Generated with the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src_ssa(I, S, D);
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
298a3eebd8 nir: Take a nir_def * in nir_tex_instr_add_src() 
NIR bits were hand-typed.  Driver updates done through the following
semantic patch:

    @@
    expression T, ST, D;
    @@

    -nir_tex_instr_add_src(T, ST, nir_src_for_ssa(D));
    +nir_tex_instr_add_src(T, ST, D);

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00