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ac: implement AMD_FORCE_FAMILY properly, remove SI_FORCE_FAMILY

Browse source 
This sets radeon_info for the forced family correctly.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24759>
This commit is contained in:
Marek Olšák 2023-08-13 17:50:47 -04:00 • committed by Marge Bot
parent 5d19a0a19b
commit a2bf30961f
9 changed files with 261 additions and 244 deletions
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235
src/amd/common/ac_gpu_info.c
View file

@ -568,6 +568,29 @@ static bool ac_query_pci_bus_info(int fd, struct radeon_info *info)
return true;
}
static void handle_env_var_force_family(struct radeon_info *info)
{
const char *family = debug_get_option("AMD_FORCE_FAMILY", NULL);
if (!family)
return;
for (unsigned i = CHIP_TAHITI; i < CHIP_LAST; i++) {
if (!strcmp(family, ac_get_llvm_processor_name(i))) {
/* Override family and gfx_level. */
info->family = i;
info->name = "NOOP";
info->gfx_level = ac_get_gfx_level(i);
info->family_id = ac_get_family_id(i);
info->family_overridden = true;
return;
}
}
fprintf(stderr, "radeonsi: Unknown family: %s\n", family);
exit(1);
}
bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
bool require_pci_bus_info)
{
@ -588,6 +611,8 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
STATIC_ASSERT(AMDGPU_HW_IP_VCN_ENC == AMD_IP_VCN_ENC);
STATIC_ASSERT(AMDGPU_HW_IP_VCN_JPEG == AMD_IP_VCN_JPEG);
handle_env_var_force_family(info);
if (!ac_query_pci_bus_info(fd, info)) {
if (require_pci_bus_info)
return false;
@ -745,80 +770,110 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
}
#define identify_chip(chipname) identify_chip2(chipname, chipname)
switch (device_info.family) {
case FAMILY_SI:
identify_chip(TAHITI);
identify_chip(PITCAIRN);
identify_chip2(CAPEVERDE, VERDE);
identify_chip(OLAND);
identify_chip(HAINAN);
break;
case FAMILY_CI:
identify_chip(BONAIRE);
identify_chip(HAWAII);
break;
case FAMILY_KV:
identify_chip2(SPECTRE, KAVERI);
identify_chip2(SPOOKY, KAVERI);
identify_chip2(KALINDI, KABINI);
identify_chip2(GODAVARI, KABINI);
break;
case FAMILY_VI:
identify_chip(ICELAND);
identify_chip(TONGA);
identify_chip(FIJI);
identify_chip(POLARIS10);
identify_chip(POLARIS11);
identify_chip(POLARIS12);
identify_chip(VEGAM);
break;
case FAMILY_CZ:
identify_chip(CARRIZO);
identify_chip(STONEY);
break;
case FAMILY_AI:
identify_chip(VEGA10);
identify_chip(VEGA12);
identify_chip(VEGA20);
identify_chip(MI100);
identify_chip(MI200);
identify_chip(GFX940);
break;
case FAMILY_RV:
identify_chip(RAVEN);
identify_chip(RAVEN2);
identify_chip(RENOIR);
break;
case FAMILY_NV:
identify_chip(NAVI10);
identify_chip(NAVI12);
identify_chip(NAVI14);
identify_chip(NAVI21);
identify_chip(NAVI22);
identify_chip(NAVI23);
identify_chip(NAVI24);
break;
case FAMILY_VGH:
identify_chip(VANGOGH);
break;
case FAMILY_RMB:
identify_chip(REMBRANDT);
break;
case FAMILY_RPL:
identify_chip2(RAPHAEL, RAPHAEL_MENDOCINO);
break;
case FAMILY_MDN:
identify_chip2(MENDOCINO, RAPHAEL_MENDOCINO);
break;
case FAMILY_GFX1100:
identify_chip(GFX1100);
identify_chip(GFX1101);
identify_chip(GFX1102);
break;
case FAMILY_GFX1103:
identify_chip(GFX1103_R1);
identify_chip(GFX1103_R2);
break;
if (!info->family_overridden) {
switch (device_info.family) {
case FAMILY_SI:
identify_chip(TAHITI);
identify_chip(PITCAIRN);
identify_chip2(CAPEVERDE, VERDE);
identify_chip(OLAND);
identify_chip(HAINAN);
break;
case FAMILY_CI:
identify_chip(BONAIRE);
identify_chip(HAWAII);
break;
case FAMILY_KV:
identify_chip2(SPECTRE, KAVERI);
identify_chip2(SPOOKY, KAVERI);
identify_chip2(KALINDI, KABINI);
identify_chip2(GODAVARI, KABINI);
break;
case FAMILY_VI:
identify_chip(ICELAND);
identify_chip(TONGA);
identify_chip(FIJI);
identify_chip(POLARIS10);
identify_chip(POLARIS11);
identify_chip(POLARIS12);
identify_chip(VEGAM);
break;
case FAMILY_CZ:
identify_chip(CARRIZO);
identify_chip(STONEY);
break;
case FAMILY_AI:
identify_chip(VEGA10);
identify_chip(VEGA12);
identify_chip(VEGA20);
identify_chip(MI100);
identify_chip(MI200);
identify_chip(GFX940);
break;
case FAMILY_RV:
identify_chip(RAVEN);
identify_chip(RAVEN2);
identify_chip(RENOIR);
break;
case FAMILY_NV:
identify_chip(NAVI10);
identify_chip(NAVI12);
identify_chip(NAVI14);
identify_chip(NAVI21);
identify_chip(NAVI22);
identify_chip(NAVI23);
identify_chip(NAVI24);
break;
case FAMILY_VGH:
identify_chip(VANGOGH);
break;
case FAMILY_RMB:
identify_chip(REMBRANDT);
break;
case FAMILY_RPL:
identify_chip2(RAPHAEL, RAPHAEL_MENDOCINO);
break;
case FAMILY_MDN:
identify_chip2(MENDOCINO, RAPHAEL_MENDOCINO);
break;
case FAMILY_GFX1100:
identify_chip(GFX1100);
identify_chip(GFX1101);
identify_chip(GFX1102);
break;
case FAMILY_GFX1103:
identify_chip(GFX1103_R1);
identify_chip(GFX1103_R2);
break;
}
if (info->ip[AMD_IP_GFX].ver_major == 11)
info->gfx_level = GFX11;
else if (info->ip[AMD_IP_GFX].ver_major == 10 && info->ip[AMD_IP_GFX].ver_minor == 3)
info->gfx_level = GFX10_3;
else if (info->ip[AMD_IP_GFX].ver_major == 10 && info->ip[AMD_IP_GFX].ver_minor == 1)
info->gfx_level = GFX10;
else if (info->ip[AMD_IP_GFX].ver_major == 9 || info->ip[AMD_IP_COMPUTE].ver_major == 9)
info->gfx_level = GFX9;
else if (info->ip[AMD_IP_GFX].ver_major == 8)
info->gfx_level = GFX8;
else if (info->ip[AMD_IP_GFX].ver_major == 7)
info->gfx_level = GFX7;
else if (info->ip[AMD_IP_GFX].ver_major == 6)
info->gfx_level = GFX6;
else {
fprintf(stderr, "amdgpu: Unknown gfx version: %u.%u\n",
info->ip[AMD_IP_GFX].ver_major, info->ip[AMD_IP_GFX].ver_minor);
return false;
}
info->family_id = device_info.family;
info->chip_external_rev = device_info.external_rev;
info->chip_rev = device_info.chip_rev;
info->marketing_name = amdgpu_get_marketing_name(dev);
info->is_pro_graphics = info->marketing_name && (strstr(info->marketing_name, "Pro") ||
strstr(info->marketing_name, "PRO") ||
strstr(info->marketing_name, "Frontier"));
}
if (!info->name) {
@ -835,26 +890,6 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
snprintf(proc_fd, sizeof(proc_fd), "/proc/self/fd/%u", fd);
UNUSED int _result = readlink(proc_fd, info->dev_filename, sizeof(info->dev_filename));
if (info->ip[AMD_IP_GFX].ver_major == 11)
info->gfx_level = GFX11;
else if (info->ip[AMD_IP_GFX].ver_major == 10 && info->ip[AMD_IP_GFX].ver_minor == 3)
info->gfx_level = GFX10_3;
else if (info->ip[AMD_IP_GFX].ver_major == 10 && info->ip[AMD_IP_GFX].ver_minor == 1)
info->gfx_level = GFX10;
else if (info->ip[AMD_IP_GFX].ver_major == 9 || info->ip[AMD_IP_COMPUTE].ver_major == 9)
info->gfx_level = GFX9;
else if (info->ip[AMD_IP_GFX].ver_major == 8)
info->gfx_level = GFX8;
else if (info->ip[AMD_IP_GFX].ver_major == 7)
info->gfx_level = GFX7;
else if (info->ip[AMD_IP_GFX].ver_major == 6)
info->gfx_level = GFX6;
else {
fprintf(stderr, "amdgpu: Unknown gfx version: %u.%u\n",
info->ip[AMD_IP_GFX].ver_major, info->ip[AMD_IP_GFX].ver_minor);
return false;
}
#define VCN_IP_VERSION(mj, mn, rv) (((mj) << 16) | ((mn) << 8) | (rv))
for (unsigned i = AMD_IP_VCN_DEC; i <= AMD_IP_VCN_JPEG; ++i) {
@ -927,14 +962,6 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
break;
}
info->family_id = device_info.family;
info->chip_external_rev = device_info.external_rev;
info->chip_rev = device_info.chip_rev;
info->marketing_name = amdgpu_get_marketing_name(dev);
info->is_pro_graphics = info->marketing_name && (strstr(info->marketing_name, "Pro") ||
strstr(info->marketing_name, "PRO") ||
strstr(info->marketing_name, "Frontier"));
/* Set which chips have dedicated VRAM. */
info->has_dedicated_vram = !(device_info.ids_flags & AMDGPU_IDS_FLAGS_FUSION);
@ -1531,9 +1558,6 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
info->conformant_trunc_coord =
info->drm_minor >= 52 &&
device_info.ids_flags & AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD;
} else {
/* This should be non-zero for SI_FORCE_FAMILY not to crash. */
info->attribute_ring_size_per_se = 64 * 1024;
}
if (info->gfx_level >= GFX11 && device_info.shadow_size > 0) {
@ -1680,6 +1704,7 @@ void ac_print_gpu_info(const struct radeon_info *info, FILE *f)
fprintf(f, " chip_rev = %i\n", info->chip_rev);
fprintf(f, "Flags:\n");
fprintf(f, " family_overridden = %u\n", info->family_overridden);
fprintf(f, " is_pro_graphics = %u\n", info->is_pro_graphics);
fprintf(f, " has_graphics = %i\n", info->has_graphics);
fprintf(f, " has_clear_state = %u\n", info->has_clear_state);

1
src/amd/common/ac_gpu_info.h
View file

@ -75,6 +75,7 @@ struct radeon_info {
uint32_t chip_rev; /* 0 = A0, 1 = A1, etc. */
/* Flags. */
bool family_overridden; /* AMD_FORCE_FAMILY was used, skip command submission */
bool is_pro_graphics;
bool has_graphics; /* false if the chip is compute-only */
uint32_t ib_pad_dw_mask[AMD_NUM_IP_TYPES];

5
src/amd/common/ac_surface.c
View file

@ -1647,11 +1647,6 @@ static bool is_dcc_supported_by_DCN(const struct radeon_info *info,
return false;
switch (info->gfx_level) {
case GFX6:
case GFX7:
case GFX8:
/* We can get here due to SI_FORCE_FAMILY. */
return false;
case GFX9:
/* There are more constraints, but we always set
* INDEPENDENT_64B_BLOCKS = 1 and MAX_COMPRESSED_BLOCK_SIZE = 64B,

126
src/amd/common/amd_family.c
View file

@ -5,7 +5,7 @@
*/
#include "amd_family.h"
#include "addrlib/src/amdgpu_asic_addr.h"
#include "util/macros.h"
const char *ac_get_family_name(enum radeon_family family)
@ -99,3 +99,127 @@ const char *ac_get_family_name(enum radeon_family family)
unreachable("Unknown GPU family");
}
}
enum amd_gfx_level ac_get_gfx_level(enum radeon_family family)
{
if (family >= CHIP_GFX1100)
return GFX11;
if (family >= CHIP_NAVI21)
return GFX10_3;
if (family >= CHIP_NAVI10)
return GFX10;
if (family >= CHIP_VEGA10)
return GFX9;
if (family >= CHIP_TONGA)
return GFX8;
if (family >= CHIP_BONAIRE)
return GFX7;
return GFX6;
}
unsigned ac_get_family_id(enum radeon_family family)
{
if (family >= CHIP_GFX1100)
return FAMILY_GFX1100;
if (family >= CHIP_NAVI21)
return FAMILY_NV;
if (family >= CHIP_NAVI10)
return FAMILY_NV;
if (family >= CHIP_VEGA10)
return FAMILY_AI;
if (family >= CHIP_TONGA)
return FAMILY_VI;
if (family >= CHIP_BONAIRE)
return FAMILY_CI;
return FAMILY_SI;
}
const char *ac_get_llvm_processor_name(enum radeon_family family)
{
switch (family) {
case CHIP_TAHITI:
return "tahiti";
case CHIP_PITCAIRN:
return "pitcairn";
case CHIP_VERDE:
return "verde";
case CHIP_OLAND:
return "oland";
case CHIP_HAINAN:
return "hainan";
case CHIP_BONAIRE:
return "bonaire";
case CHIP_KABINI:
return "kabini";
case CHIP_KAVERI:
return "kaveri";
case CHIP_HAWAII:
return "hawaii";
case CHIP_TONGA:
return "tonga";
case CHIP_ICELAND:
return "iceland";
case CHIP_CARRIZO:
return "carrizo";
case CHIP_FIJI:
return "fiji";
case CHIP_STONEY:
return "stoney";
case CHIP_POLARIS10:
return "polaris10";
case CHIP_POLARIS11:
case CHIP_POLARIS12:
case CHIP_VEGAM:
return "polaris11";
case CHIP_VEGA10:
return "gfx900";
case CHIP_RAVEN:
return "gfx902";
case CHIP_VEGA12:
return "gfx904";
case CHIP_VEGA20:
return "gfx906";
case CHIP_RAVEN2:
case CHIP_RENOIR:
return "gfx909";
case CHIP_MI100:
return "gfx908";
case CHIP_MI200:
return "gfx90a";
case CHIP_GFX940:
return "gfx940";
case CHIP_NAVI10:
return "gfx1010";
case CHIP_NAVI12:
return "gfx1011";
case CHIP_NAVI14:
return "gfx1012";
case CHIP_NAVI21:
return "gfx1030";
case CHIP_NAVI22:
return "gfx1031";
case CHIP_NAVI23:
return "gfx1032";
case CHIP_VANGOGH:
return "gfx1033";
case CHIP_NAVI24:
return "gfx1034";
case CHIP_REMBRANDT:
return "gfx1035";
case CHIP_RAPHAEL_MENDOCINO:
return "gfx1036";
case CHIP_GFX1100:
return "gfx1100";
case CHIP_GFX1101:
return "gfx1101";
case CHIP_GFX1102:
return "gfx1102";
case CHIP_GFX1103_R1:
case CHIP_GFX1103_R2:
return "gfx1103";
default:
return "";
}
}

3
src/amd/common/amd_family.h
View file

@ -199,6 +199,9 @@ enum vcn_version{
};
const char *ac_get_family_name(enum radeon_family family);
enum amd_gfx_level ac_get_gfx_level(enum radeon_family family);
unsigned ac_get_family_id(enum radeon_family family);
const char *ac_get_llvm_processor_name(enum radeon_family family);
#ifdef __cplusplus
}

88
src/amd/llvm/ac_llvm_util.c
View file

@ -81,94 +81,6 @@ LLVMTargetRef ac_get_llvm_target(const char *triple)
return target;
}
const char *ac_get_llvm_processor_name(enum radeon_family family)
{
switch (family) {
case CHIP_TAHITI:
return "tahiti";
case CHIP_PITCAIRN:
return "pitcairn";
case CHIP_VERDE:
return "verde";
case CHIP_OLAND:
return "oland";
case CHIP_HAINAN:
return "hainan";
case CHIP_BONAIRE:
return "bonaire";
case CHIP_KABINI:
return "kabini";
case CHIP_KAVERI:
return "kaveri";
case CHIP_HAWAII:
return "hawaii";
case CHIP_TONGA:
return "tonga";
case CHIP_ICELAND:
return "iceland";
case CHIP_CARRIZO:
return "carrizo";
case CHIP_FIJI:
return "fiji";
case CHIP_STONEY:
return "stoney";
case CHIP_POLARIS10:
return "polaris10";
case CHIP_POLARIS11:
case CHIP_POLARIS12:
case CHIP_VEGAM:
return "polaris11";
case CHIP_VEGA10:
return "gfx900";
case CHIP_RAVEN:
return "gfx902";
case CHIP_VEGA12:
return "gfx904";
case CHIP_VEGA20:
return "gfx906";
case CHIP_RAVEN2:
case CHIP_RENOIR:
return "gfx909";
case CHIP_MI100:
return "gfx908";
case CHIP_MI200:
return "gfx90a";
case CHIP_GFX940:
return "gfx940";
case CHIP_NAVI10:
return "gfx1010";
case CHIP_NAVI12:
return "gfx1011";
case CHIP_NAVI14:
return "gfx1012";
case CHIP_NAVI21:
return "gfx1030";
case CHIP_NAVI22:
return "gfx1031";
case CHIP_NAVI23:
return "gfx1032";
case CHIP_VANGOGH:
return "gfx1033";
case CHIP_NAVI24:
return "gfx1034";
case CHIP_REMBRANDT:
return "gfx1035";
case CHIP_RAPHAEL_MENDOCINO:
return "gfx1036";
case CHIP_GFX1100:
return "gfx1100";
case CHIP_GFX1101:
return "gfx1101";
case CHIP_GFX1102:
return "gfx1102";
case CHIP_GFX1103_R1:
case CHIP_GFX1103_R2:
return "gfx1103";
default:
return "";
}
}
static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
enum ac_target_machine_options tm_options,
LLVMCodeGenOptLevel level,

1
src/amd/llvm/ac_llvm_util.h
View file

@ -58,7 +58,6 @@ struct ac_llvm_compiler {
};
LLVMTargetRef ac_get_llvm_target(const char *triple);
const char *ac_get_llvm_processor_name(enum radeon_family family);
void ac_llvm_run_atexit_for_destructors(void);
bool ac_is_llvm_processor_supported(LLVMTargetMachineRef tm, const char *processor);
void ac_reset_llvm_all_options_occurrences();

2
src/gallium/drivers/radeonsi/glsl_tests/amdgcn_glslc.c
View file

@ -172,7 +172,7 @@ main(int argc, char **argv)
for (int i = 1; i < argc; i++) {
if (strstr(argv[i], "-mcpu=") == argv[i]) {
setenv("SI_FORCE_FAMILY", argv[i] + 6, 1);
setenv("AMD_FORCE_FAMILY", argv[i] + 6, 1);
} else if (filename == NULL) {
filename = argv[i];
} else {

44
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
View file

@ -30,46 +30,6 @@ static simple_mtx_t dev_tab_mutex = SIMPLE_MTX_INITIALIZER;
DEBUG_GET_ONCE_BOOL_OPTION(all_bos, "RADEON_ALL_BOS", false)
#endif
static void handle_env_var_force_family(struct amdgpu_winsys *ws)
{
const char *family = debug_get_option("SI_FORCE_FAMILY", NULL);
unsigned i;
if (!family)
return;
for (i = CHIP_TAHITI; i < CHIP_LAST; i++) {
if (!strcmp(family, ac_get_llvm_processor_name(i))) {
/* Override family and gfx_level. */
ws->info.family = i;
ws->info.name = "NOOP";
strcpy(ws->info.lowercase_name , "noop");
if (i >= CHIP_GFX1100)
ws->info.gfx_level = GFX11;
else if (i >= CHIP_NAVI21)
ws->info.gfx_level = GFX10_3;
else if (i >= CHIP_NAVI10)
ws->info.gfx_level = GFX10;
else if (i >= CHIP_VEGA10)
ws->info.gfx_level = GFX9;
else if (i >= CHIP_TONGA)
ws->info.gfx_level = GFX8;
else if (i >= CHIP_BONAIRE)
ws->info.gfx_level = GFX7;
else
ws->info.gfx_level = GFX6;
/* Don't submit any IBs. */
setenv("RADEON_NOOP", "1", 1);
return;
}
}
fprintf(stderr, "radeonsi: Unknown family: %s\n", family);
exit(1);
}
/* Helper function to do the ioctls needed for setup and init. */
static bool do_winsys_init(struct amdgpu_winsys *ws,
const struct pipe_screen_config *config,
@ -82,8 +42,6 @@ static bool do_winsys_init(struct amdgpu_winsys *ws,
if (ws->info.has_dedicated_vram)
ws->info.has_local_buffers = false;
handle_env_var_force_family(ws);
ws->addrlib = ac_addrlib_create(&ws->info, &ws->info.max_alignment);
if (!ws->addrlib) {
fprintf(stderr, "amdgpu: Cannot create addrlib.\n");
@ -92,7 +50,7 @@ static bool do_winsys_init(struct amdgpu_winsys *ws,
ws->check_vm = strstr(debug_get_option("R600_DEBUG", ""), "check_vm") != NULL ||
strstr(debug_get_option("AMD_DEBUG", ""), "check_vm") != NULL;
ws->noop_cs = debug_get_bool_option("RADEON_NOOP", false);
ws->noop_cs = ws->info.family_overridden || debug_get_bool_option("RADEON_NOOP", false);
#if DEBUG
ws->debug_all_bos = debug_get_option_all_bos();
#endif