Commit graph

13547 commits

Author SHA1 Message Date
David Rosca
d57241d290 radeonsi/vcn: Set H264/HEVC chroma sample location in bitstream
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25078>
2023-09-14 13:39:59 +00:00
Samuel Pitoiset
aca2adc36c ac/spm: add SPM counters configuration for GFX11
All SQ counters changed to SQ_WGP and the L2 miss changed too.
Sourced from PAL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25175>
2023-09-14 12:30:52 +00:00
Samuel Pitoiset
42d67183e7 ac/perfcounter: add new SQ_WGP block for GFX11+
According to PAL, these SQ counters can be sampled at WGP granularity.
Some SPM counters captured for RGP are using this GPU block.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25175>
2023-09-14 12:30:52 +00:00
Samuel Pitoiset
31e6c05527 ac,radv,radeonsi: rework SPM counters configuration and share it
This should be easier to add GFX11 support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25175>
2023-09-14 12:30:52 +00:00
Daniel Schürmann
6eaf416f35 aco/insert_exec_mask: Simplify WQM handling (2/2)
by calculating WQM requirements on demand.

No fossil-db changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:23 +00:00
Daniel Schürmann
5f66723188 aco/insert_exec_mask: Simplify WQM handling (1/2)
by using p_end_wqm as indicator for when to end WQM mode.

Totals from 10049 (13.12% of 76572) affected shaders: (GFX11)

MaxWaves: 301126 -> 301136 (+0.00%)
Instrs: 7061909 -> 7049272 (-0.18%); split: -0.21%, +0.03%
CodeSize: 37720684 -> 37664244 (-0.15%); split: -0.18%, +0.03%
VGPRs: 357204 -> 357180 (-0.01%); split: -0.13%, +0.12%
Latency: 62757830 -> 62827080 (+0.11%); split: -0.06%, +0.17%
InvThroughput: 8589248 -> 8589963 (+0.01%); split: -0.02%, +0.02%
VClause: 132541 -> 132547 (+0.00%); split: -0.03%, +0.03%
SClause: 322916 -> 322964 (+0.01%); split: -0.04%, +0.05%
Copies: 546446 -> 547657 (+0.22%); split: -0.13%, +0.35%
Branches: 189527 -> 188293 (-0.65%)
PreSGPRs: 332792 -> 332529 (-0.08%); split: -0.08%, +0.00%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:23 +00:00
Daniel Schürmann
45f6d38a76 aco: insert a single p_end_wqm after the last derivative calculation
This new instruction replaces p_wqm.

Totals from 28065 (36.65% of 76572) affected shaders: (GFX11)
MaxWaves: 823922 -> 823952 (+0.00%); split: +0.01%, -0.01%
Instrs: 22221375 -> 22180465 (-0.18%); split: -0.26%, +0.08%
CodeSize: 117310676 -> 117040684 (-0.23%); split: -0.30%, +0.07%
VGPRs: 1183476 -> 1186656 (+0.27%); split: -0.19%, +0.46%
SpillSGPRs: 2305 -> 2302 (-0.13%)
Latency: 176559310 -> 176427793 (-0.07%); split: -0.21%, +0.14%
InvThroughput: 26245204 -> 26195550 (-0.19%); split: -0.26%, +0.07%
VClause: 368058 -> 369460 (+0.38%); split: -0.21%, +0.59%
SClause: 857077 -> 842588 (-1.69%); split: -2.06%, +0.37%
Copies: 1245650 -> 1249434 (+0.30%); split: -0.33%, +0.63%
Branches: 394837 -> 396070 (+0.31%); split: -0.01%, +0.32%
PreSGPRs: 1019139 -> 1019567 (+0.04%); split: -0.02%, +0.06%
PreVGPRs: 925739 -> 931860 (+0.66%); split: -0.00%, +0.66%

Changes are due to scheduling and re-enabling cross-lane optimizations.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:23 +00:00
Daniel Schürmann
28904839da aco: don't insert a copy when emitting p_wqm
Totals from 351 (0.46% of 76572) affected shaders: (GFX11)

Instrs: 709202 -> 709600 (+0.06%); split: -0.02%, +0.08%
CodeSize: 3606364 -> 3608040 (+0.05%); split: -0.01%, +0.06%
Latency: 3589841 -> 3590756 (+0.03%); split: -0.01%, +0.03%
InvThroughput: 463303 -> 463324 (+0.00%)
SClause: 28147 -> 28201 (+0.19%); split: -0.02%, +0.22%
Copies: 43243 -> 43204 (-0.09%); split: -0.24%, +0.15%
PreSGPRs: 21028 -> 21042 (+0.07%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:22 +00:00
Daniel Schürmann
040142684c aco: make p_wqm a marker instruction without Operands/Definitions
Totals from 28277 (36.93% of 76572) affected shaders: (GFX11)

MaxWaves: 833930 -> 833898 (-0.00%); split: +0.01%, -0.01%
Instrs: 21366950 -> 21353346 (-0.06%); split: -0.11%, +0.05%
CodeSize: 112855368 -> 112610508 (-0.22%); split: -0.24%, +0.03%
VGPRs: 1157748 -> 1158540 (+0.07%); split: -0.10%, +0.17%
SpillSGPRs: 2465 -> 2463 (-0.08%); split: -0.16%, +0.08%
Latency: 168339886 -> 168383646 (+0.03%); split: -0.10%, +0.12%
InvThroughput: 25164895 -> 25158376 (-0.03%); split: -0.08%, +0.06%
VClause: 347660 -> 346256 (-0.40%); split: -0.55%, +0.15%
SClause: 794460 -> 799521 (+0.64%); split: -0.33%, +0.97%
Copies: 1151908 -> 1148370 (-0.31%); split: -0.54%, +0.23%
Branches: 359447 -> 359437 (-0.00%); split: -0.01%, +0.00%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:22 +00:00
Daniel Schürmann
1275981df8 aco: don't optimize cross-lane instructions across p_wqm
We will use p_wqm as a marker in the next step.

Totals from 8846 (11.55% of 76572) affected shaders: (GFX11)

Instrs: 7031274 -> 7072729 (+0.59%); split: -0.02%, +0.60%
CodeSize: 37060272 -> 37355244 (+0.80%); split: -0.01%, +0.80%
VGPRs: 402660 -> 398724 (-0.98%); split: -0.99%, +0.01%
Latency: 62231926 -> 62322311 (+0.15%); split: -0.01%, +0.15%
InvThroughput: 10341361 -> 10392589 (+0.50%); split: -0.00%, +0.50%
VClause: 105344 -> 105368 (+0.02%); split: -0.03%, +0.05%
SClause: 218330 -> 218469 (+0.06%); split: -0.07%, +0.14%
Copies: 378609 -> 377644 (-0.25%); split: -0.42%, +0.17%
Branches: 97218 -> 97207 (-0.01%); split: -0.01%, +0.00%
PreSGPRs: 307654 -> 307644 (-0.00%); split: -0.08%, +0.08%
PreVGPRs: 314744 -> 308650 (-1.94%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:22 +00:00
Daniel Schürmann
0907b53740 aco/insert_exec_mask: set Exact mode after p_discard_if when necessary
Fixes: 5e9df85b1a ('aco: optimize discard_if when WQM is not needed afterwards')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:22 +00:00
Rhys Perry
41b6020ff3 aco: remove fast path in insert_exec_mask's process_instructions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:22 +00:00
Daniel Schürmann
0e8192a76b aco: append p_logical_end after monolithic RT shaders
Fixes: bdec044c88 ('aco: Do not fixup registers if there are no shader calls')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25038>
2023-09-14 09:25:22 +00:00
Dave Airlie
c5fb2fff18 ac,radeonsi: move vcn enc av1 default cdf file to common
This can be used by radv.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25196>
2023-09-14 07:51:24 +00:00
Dave Airlie
daa01703cc ac,radeonsi: move vcn enc structs to common
This just moves the header to make it easier to share with radv.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25196>
2023-09-14 07:51:24 +00:00
Samuel Pitoiset
f8a7c8edd1 radv: emit relocation for mesh/task shaders
RGP requires shaders to be contiguous in memory.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25144>
2023-09-14 07:19:26 +00:00
Samuel Pitoiset
312103e0ff radv: set THREAD_TRACE_MARKER_ENABLE for mesh/task draws
PAL does that.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25144>
2023-09-14 07:19:25 +00:00
Samuel Pitoiset
505c2ee92d ac/rgp: use correct API stage string for mesh/task shaders
This allows RGP to report the ISA.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25144>
2023-09-14 07:19:25 +00:00
Samuel Pitoiset
12f1c5d23b radv: fix instruction timing on GFX11
GFX11 seems to operate on the last active CU.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25171>
2023-09-14 06:29:10 +00:00
Samuel Pitoiset
c04b10155e radv: disable unsupported hw shader stages for RGP on GFX11+
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25171>
2023-09-14 06:29:10 +00:00
Samuel Pitoiset
4f5dd54713 radv: set THREAD_TRACE_TOKEN_MASK.BOP_EVENTS_TOKEN_INCLUDE on GFX10.3+
PAL does that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25171>
2023-09-14 06:29:10 +00:00
Dave Airlie
3740b6f599 radv/video: take db alignment into account when allocating images.
Make sure to take the db alignment into account when sizing the underlying
images.

Fixes a 360p sample from Lynne.

Cc: mesa-stable
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25168>
2023-09-14 01:48:49 +00:00
Daniel Stone
99ec13742b ci/radeonsi: Skip more really slow tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25207>
2023-09-13 16:01:24 +00:00
Dave Airlie
147c17c28c radv: don't emit event code on video queues.
I don't know if these can be done properly, but for now just don't
emit the standard cp stuff since it hangs the GPU.

"Fixes" dEQP-VK.video.synchronizat*

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25170>
2023-09-12 21:42:28 +00:00
Rhys Perry
f9b341cbf4 radv: use shortcut_1d_workgroup_id
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24882>
2023-09-12 14:31:07 +00:00
Rhys Perry
2965a9d510 radv: optimize mesh workgroup ID using ts_mesh_dispatch_dimensions
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24882>
2023-09-12 14:31:07 +00:00
Samuel Pitoiset
2cc981a0cd radv: fix capturing RGP on RDNA3 with more than one Shader Engine
PKT3_RESET_FILTER_CAM_S seems required on GFX11. Otherwise, capturing
with more than on SE can hang.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25156>
2023-09-12 08:38:39 +00:00
Samuel Pitoiset
6caae898dd radv: fix emitting SQTT userdata when CAM is needed
The third parameter of PKT3 is the predicate bit and this was wrong.
PAL sets the RESET_FILTER_CAM bit when emitting SQTT userdata.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25158>
2023-09-12 07:07:10 +00:00
Konstantin Seurer
028ba76a00 radv/ci: Document new flake
Reviewed-by: Martin Roukala <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25140>
2023-09-11 16:33:31 +00:00
Daniel Stone
abb612ec1f ci/radeonsi: Add new flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25149>
2023-09-11 14:10:23 +00:00
Alba Mendez
e3aab80d4f meson: support installation tags
the only thing missing is to tag custom install targets, namely:
 - ICDs (vulkan, glvnd, OpenCL, VA-API, VDPAU)
 - Vulkan layers
 - custom install script for megadrivers
 - drirc file

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24911>
2023-09-11 13:00:45 +00:00
Samuel Pitoiset
729cb4004a radv: fix enabling DGCC
This was broken if only DGC (graphics) is enabled.

Fixes: 559da06755 ("radv: implement NV_device_generated_commands_compute")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25126>
2023-09-11 07:13:10 +00:00
Konstantin Seurer
df710fe695 radv/rt: Enable monolithic pipelines
Store can_inline inside the stages to avoid rerunning the analysis pass
for library stages.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21929>
2023-09-10 11:40:12 +00:00
Konstantin Seurer
f2514e75f0 radv/rt: Add monolithic raygen lowering
Ray traversal is inlined to allow for constant folding and avoid
spilling.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21929>
2023-09-10 11:40:12 +00:00
Konstantin Seurer
e039e3cd76 radv/rt: Store NIR shaders separately
In order to compile monolithic shaders with pipeline libraries, we need
to keep the NIR around for inlining recursive stages.

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21929>
2023-09-10 11:40:12 +00:00
Konstantin Seurer
28e1e33c32 radv: Don't use the depth image view for depth bias emission
If the application records a secondary command buffer that inherits
a render pass without specifying a framebuffer, we should still be able
to emit the depth bias state properly.

Fixes: 266b2cf ("radv: implement VK_EXT_depth_bias_control")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9588
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25018>
2023-09-08 19:26:59 +00:00
Tatsuyuki Ishi
4171d9ff84 radv/amdgpu: Use rwlock to protect access to virtual BOs.
Vulkan provides no external synchronization guarantees on sparse memory
objects. Use a per-BO rwlock to prevent reading data mid-update.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24806>
2023-09-08 18:53:37 +00:00
Samuel Pitoiset
64a5472ad7 radv: remove useless PIPELINE_CREATE_2_LIBRARY_BIT check for retained shaders
VK_PIPELINE_CREATE_2_RETAIN_LINK_TIME_OPTIMIZATION_INFO_BIT_EXT is only
allowed for pipeline libs, so VK_PIPELINE_CREATE_2_LIBRARY_BIT_KHR
should also be set.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25110>
2023-09-08 16:26:40 +00:00
Samuel Pitoiset
adaf4460bd radv: do not use pre-compiled prologs when VS is compiled separately
This wouldn't work for VS+TCS or VS+GS if they are compiled separately
on GFX9+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
2023-09-08 12:43:29 +00:00
Samuel Pitoiset
871a383671 radv: adjust emitted prolog regs for merged shaders compiled separately
It should also be the merged shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
2023-09-08 12:43:28 +00:00
Samuel Pitoiset
657cabe17e radv: adjust next stage for VS prologs and merged shaders compiled separately
It should be the merged shader stage.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24933>
2023-09-08 12:43:28 +00:00
Georg Lehmann
524a894ba4 aco/gfx11: don't use bfe for local_invocation_id if the others are always 0
Foz-DB GFX1100:
Totals from 4469 (3.37% of 132657) affected shaders:
Instrs: 3895053 -> 3893529 (-0.04%); split: -0.04%, +0.00%
CodeSize: 20244128 -> 20220952 (-0.11%); split: -0.11%, +0.00%
Latency: 37864147 -> 37862227 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 5578100 -> 5576469 (-0.03%); split: -0.03%, +0.00%
SClause: 108336 -> 108343 (+0.01%); split: -0.00%, +0.01%
Copies: 275897 -> 275900 (+0.00%); split: -0.00%, +0.00%

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24514>
2023-09-08 11:28:24 +00:00
Pierre-Eric Pelloux-Prayer
84e61d606b radv/sdma: use correct limits for gfx10.3
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24771>
2023-09-08 09:15:20 +00:00
Pierre-Eric Pelloux-Prayer
c707cb51e5 radv/sdma: use multiple commands if required
Instead of failing the copy we can use multiple chunks.

This codepath shouldn't really be used since the source
image should usually be tiled but it still better to not
fail when possible.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24771>
2023-09-08 09:15:20 +00:00
Timothy Arceri
af1528cc15 nir: replace use of nir_src_copy()
Since 03b2c34793 nir_src_copy() no longer does anything useful,
it will be removed in the following patch.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24986>
2023-09-08 03:01:39 +00:00
Bas Nieuwenhuizen
4303ea7b9a radv: Use a double jump to limit nops in DGC for dynamic sequence count.
Some RGP data showing that a large amount of NOPs might be a performance
concern.

Some data from a Granite demo repurposed as benchmark:
  - with max_count = 16, actual draw count 1-4, the new path is ~5% slower
  - with max_count = 2048, actual draw count 1-4, the new path is >2x as fast.
  - with max_count = 16384, actual draw count 1-4, the new path is >7x as fast.

Due to the new path being slower in e.g. small cmdbuffers I added a heuristic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25046>
2023-09-08 00:41:34 +00:00
Samuel Pitoiset
a2ead228ac radv: avoid emitting THREAD_TRACE_MARKER for predicated draws/dispatches
This confused RGP for example when DGC calls are skipped.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Samuel Pitoiset
51eb072eb6 radv: skip DGC calls when the indirect sequence count is zero with a predicate
Starfield has a lot of empty ExecuteIndirect() calls. This optimizes
them by using the indirect sequence count as predicate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25060>
2023-09-07 22:51:51 +00:00
Martin Roukala (né Peres)
13723e3097 radv/ci: use the default kernel on vkcts-navi10
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7888
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25095>
2023-09-07 21:02:25 +00:00
Martin Roukala (né Peres)
76ef5f82ab radv/ci: drop the auto-reboot-on-hang for vkcts-navi10
Anecdotal evidence seems to suggest this is not happening anymore, so
let's try dropping it and see how it fares!

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25095>
2023-09-07 21:02:25 +00:00