Commit graph

7838 commits

Author SHA1 Message Date
Timur Kristóf
92e1981a80 radv: Remove PSIZ output when it isn't needed.
PSIZ output is only needed when:
1. There is a next stage and it reads it.
2. Primitive topology is point list, in the last vertex pipeline stage.

Zink always adds this output in its vertex (and other) shaders,
because it helps Zink avoid recompiling shader variants.

However, this has a performance impact for RADV because
it needs a scalar memory load. That becomes noticeable
at high primitive rates.

The Fossil stats are unremarkable because our DB doesn't include any
shaders from Zink or D9VK, but there are a few affected shaders.

Note that there may be an increase in LDS use in some GS. This is
because with PSIZ removed the ES per-vertex LDS size is smaller, so
we can squeeze more GS threads in the same workgroup.

Fossil DB stats on Sienna Cichlid:

Totals from 14 (0.01% of 128647) affected shaders:
CodeSize: 119884 -> 119732 (-0.13%)
LDS: 235008 -> 228864 (-2.61%); split: -2.83%, +0.22%
Instrs: 23076 -> 23048 (-0.12%)
Latency: 71667 -> 71625 (-0.06%)
InvThroughput: 19155 -> 18870 (-1.49%)
Copies: 1586 -> 1572 (-0.88%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10725>
2021-09-16 11:06:05 +00:00
Samuel Pitoiset
09ef427f94 radv/ci: add a list of expected failures for VanGogh
Empty means 100% passrate like Sienna Cichlid.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12872>
2021-09-15 18:20:07 +02:00
Samuel Pitoiset
3bb5082900 radv: advertise EXT_shader_atomic_float2 with LLVM 14+
The intrinsics aren't exposed on earlier LLVM versions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12716>
2021-09-15 14:10:42 +00:00
Samuel Pitoiset
7a25451752 ac/llvm: implement nir_intrinsic_global_atomic_{fmin,fmax}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12716>
2021-09-15 14:10:42 +00:00
Samuel Pitoiset
9deee80f51 ac/llvm: implement nir_intrinsic_shared_atomic_{fmin,fmax}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12716>
2021-09-15 14:10:42 +00:00
Samuel Pitoiset
efe40c98ed ac/llvm: implement nir_intrinsic_ssbo_atomic_{fmin,fmax}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12716>
2021-09-15 14:10:42 +00:00
Samuel Pitoiset
cf3e31fd11 ac/llvm: implement nir_intrinsic_image_deref_atomic_{fmin,fmax}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12716>
2021-09-15 14:10:42 +00:00
Samuel Pitoiset
3a26dfe761 radv/llvm: fix vertex input fetches with 16-bit floats
Not ideal but ac/llvm and RADV works with integers, so passing a
16-bit float type would break more than it helps.

Fixes a few CTS with 16-bit float IO.

Fixes: 3fb229e010 ("ac,radeonsi: load VS inputs at the call site of nir_intrinsic_load_input")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12835>
2021-09-15 11:48:01 +00:00
Samuel Pitoiset
5eda8e5fe9 radv/llvm: fix using Wave32
The Wave32 pass manager has been removed a while ago.

Fixes: 94a1f45e15 ("ac/llvm: set target features per function instead of per target machine")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12833>
2021-09-15 12:31:32 +02:00
Samuel Pitoiset
9bf977ffa5 radv: reduce SQTT traffic when instruction timing is disabled
Some tokens can be excluded without instruction timing. This reduces
RGP capture sizes significantly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12853>
2021-09-15 10:48:58 +02:00
Joshua Ashton
fe96cea2f3 radv: Disable DCC on storage images that cannot support DCC image stores
Additional work is needed for storage images with DCC without DCC image stores to not be broken.

Fixes black screens in Doom Eternal.

Fixes: #5345
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12818>
2021-09-15 00:21:04 +00:00
Emma Anholt
aed4c0b5a9 nir: Drop the unused instr arg for src/dest copy functions.
Now that we don't use ralloc, we don't need this arg to get at the right
ralloc ctx.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11776>
2021-09-14 17:53:06 +00:00
Marek Olšák
b330c7cb2a radeonsi: use a trick to extract and pack edgeflags using fewer instructions
This removes 4 instructions from the prim export packing.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12343>
2021-09-14 15:24:11 +00:00
Charlie Turner
c38318aee2 radv/ci: Fix the GPU_VERSION for polaris10
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11426>
2021-09-14 11:31:26 +00:00
Charlie Turner
b75dc87762 radv/ci: Remove duplication in dEQP skip lists.
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11426>
2021-09-14 11:31:26 +00:00
Simon Ser
3c18e69078 vulkan/wsi/x11: add driconf option to not wait under Xwayland
By default, Mesa's X11 Vulkan WSI will wait for buffers to be ready
before submitting them to Xwayland when the swapchain is created
with the IMMEDIATE mode.

This is undesirable when the Wayland compositor already monitors
fences. A Wayland compositor may want to know the delay between
the buffer submition and the end of the GPU work, this is impossible
to measure if the WSI waits for the buffer to be ready before
submission.

Since most compositors don't monitor fences, let's introduce a driconf
option for this for now. We can reconsider once more compositors
have better support for fences.

Signed-off-by: Simon Ser <contact@emersion.fr>
Acked-by: Michel Dänzer <mdaenzer@redhat.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11290>
2021-09-13 19:38:13 +00:00
Samuel Pitoiset
b269f59ec5 radv: enable comp-to-single for MSAA images
This allows fast clears for concurrent MSAA images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12483>
2021-09-13 16:43:07 +00:00
Samuel Pitoiset
de8865df56 radv: add MSAA support to the comp-to-single fast clear path
Clearing the first sample is enough as long as CMASK is also cleared
to indicate that other samples are also cleared.

I verified that the first sample is always at the beginning of 256B
blocks.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12483>
2021-09-13 16:43:07 +00:00
Charlie Turner
a356da6357 ci: Fix syntax error in radv fails files
Fixes instances of,

  Error: Failed to parse dEQP-VK.ssbo.phys.layout.random.8bit.all_per_block_buffers.46 as CSV test,status[,duration] or comment at line 1

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Martin Peres <martin.peres@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12777>
2021-09-13 13:31:20 +00:00
Bas Nieuwenhuizen
afee571d2b radv: Expose a bufferImageGranularity of 1.
It shouldn't matter as image & buffer alignment are enough and we
don't need any alignment between the two.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5213
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12765>
2021-09-13 13:12:41 +00:00
Samuel Pitoiset
09cf2584bd ac/llvm: fix build with LLVM 14
AttributeList::hasAttribute() has been replaced by
hasParamAttr()/hasRetAttr().

All supported LLVM versions have hasParamAttr().

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5320
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Michel Dänzer <mdaenzer@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12715>
2021-09-13 10:04:30 +02:00
Joshua Ashton
138463d3c3 radv: Fix DCC image store check
Doesn't seem to be causing any issues right now but could with modifiers potentially.

Matches what is in RadeonSI where the comment is also shamelessly stolen from.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12811>
2021-09-11 05:58:06 +00:00
Daniel Schürmann
eb8ec12b23 aco/ra: Fix potential out-of-bounds array accesses.
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12748>
2021-09-10 19:39:18 +00:00
Timur Kristóf
536580b139 aco: Add some useful info to the README for debugging.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12748>
2021-09-10 19:39:18 +00:00
Marek Olšák
69e96cfc0d ac,radv: remove unused inputs array and VS input code
The previous commit stopped using "inputs".

"load_layer_id" has always been broken and it was probably unused anyway.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
3fb229e010 ac,radeonsi: load VS inputs at the call site of nir_intrinsic_load_input
to match ACO

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
bce7c7f3fc ac/llvm: implement nir_intrinsic_elect
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
e0f07483d0 ac/llvm: implement nir_intrinsic_overwrite_*_arguments_amd
This should work if the intrinsics are not called from conditional blocks.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
1e178f7a37 ac: make ac_shader_abi::inputs an array instead of a pointer
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
6df5f268db ac: remove needless parameters from ac_shader_abi::emit_outputs
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
2e95ad1433 ac/llvm: implement a bunch of NIR AMD intrinsics for NGG
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Marek Olšák
a33602b1f9 ac/llvm: remove load_tess_coord callback
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12570>
2021-09-07 17:51:41 +00:00
Rhys Perry
c1e668d5d1 aco/ra: don't use ds_write_b8_d16_hi/ds_write_b16_d16_hi on GFX8
GFX8 doesn't support these opcodes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: c75138ed64 ("aco/ra: refactor subdword definition info")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12721>
2021-09-06 15:10:26 +00:00
Timur Kristóf
268158a758 aco/optimize_postRA: Use iterators instead of operator[] of std::array.
Also add a few more assertions to make sure the registers are
within the bounds of the array.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>
2021-09-03 15:00:55 +00:00
Timur Kristóf
bb956464cb aco: Skip code paths to emit copies when there are no copies.
Found while running with libstdc++ debug mode.
Fixes the following:

Error: attempt to advance a dereferenceable (start-of-sequence)
iterator -1 steps, which falls outside its valid range.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>
2021-09-03 15:00:55 +00:00
Timur Kristóf
728ed892df aco: Use Builder reference in emit_copies_block.
Found while running with libstdc++ debug mode.
Fixes the following:

Error: attempt to copy-construct an iterator from a singular iterator.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12682>
2021-09-03 15:00:55 +00:00
Rhys Perry
522f135d06 radv: expose VK_KHR_shader_integer_dot_product
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:28 +00:00
Rhys Perry
8037b21573 aco/ra: allow v1b operands with 16-bit instructions
Instruction selection can create these.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: ec1bbfa608 ("aco/ra: refactor subdword operand stride")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:28 +00:00
Rhys Perry
2a7fa132be aco: implement udot_4x8/sdot_4x8/udot_2x16/sdot_2x16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:28 +00:00
Rhys Perry
e0d232c2fc aco: implement nir_op_pack_32_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:28 +00:00
Rhys Perry
4dd420f76d radv,aco: implement iadd_sat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:28 +00:00
Rhys Perry
44be450dc1 radv: refactor handling of nir_options
Make it easier to change them depending on chip_class and family.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:28 +00:00
Rhys Perry
859790ba54 ac/llvm: implement udot_4x8/sdot_4x8/udot_2x16/sdot_2x16 opcodes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:27 +00:00
Rhys Perry
d6619d0a01 ac/llvm,radv: implement uadd_sat/iadd_sat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:27 +00:00
Rhys Perry
f7cdd49a09 ac/llvm: implement nir_op_pack_32_4x8
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:27 +00:00
Rhys Perry
40a0935899 ac/gpu_info: add has_accelerated_dot_product
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
2021-09-03 13:21:27 +00:00
Rhys Perry
54f83d718a aco/spill: add temporary operands of exec phis to next_use_distances_end
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: dfb10e4f4b ("aco/spill: don't count phis as variable access")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12702>
2021-09-03 14:01:27 +01:00
Rhys Perry
f241bd3749 aco: don't coalesce constant copies into non-power-of-two sizes
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12702>
2021-09-03 14:01:27 +01:00
Samuel Pitoiset
ad878856e6 radv/llvm: rework VS input loads and implement the callback
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12693>
2021-09-03 08:14:51 +00:00
Samuel Pitoiset
1402c17e4f radv: optimize VRS when no depth stencil attachment is bound
This is allowed by the Vulkan spec and we have to handle this situation
internally. We used to create and bind a 4096x4096 image to copy the
VRS rates but this wasted too much VRAM (~33MiB). Now, the driver only
allocates a HTILE buffer (~1MiB) and bind it to the framebuffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12243>
2021-09-02 19:39:04 +00:00