mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-05-08 11:18:08 +02:00
ac/gpu_info: add has_accelerated_dot_product
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12617>
This commit is contained in:
parent
137974fabb
commit
40a0935899
2 changed files with 8 additions and 0 deletions
|
|
@ -870,6 +870,13 @@ bool ac_query_gpu_info(int fd, void *dev_p, struct radeon_info *info,
|
|||
/* Whether chips support double rate packed math instructions. */
|
||||
info->has_packed_math_16bit = info->chip_class >= GFX9;
|
||||
|
||||
/* Whether chips support dot product instructions. A subset of these support a smaller
|
||||
* instruction encoding which accumulates with the destination.
|
||||
*/
|
||||
info->has_accelerated_dot_product =
|
||||
info->family == CHIP_ARCTURUS || info->family == CHIP_ALDEBARAN ||
|
||||
info->family == CHIP_VEGA20 || info->family >= CHIP_NAVI12;
|
||||
|
||||
/* TODO: Figure out how to use LOAD_CONTEXT_REG on GFX6-GFX7. */
|
||||
info->has_load_ctx_reg_pkt =
|
||||
info->chip_class >= GFX9 || (info->chip_class >= GFX8 && info->me_fw_feature >= 41);
|
||||
|
|
|
|||
|
|
@ -70,6 +70,7 @@ struct radeon_info {
|
|||
bool has_load_ctx_reg_pkt;
|
||||
bool has_out_of_order_rast;
|
||||
bool has_packed_math_16bit;
|
||||
bool has_accelerated_dot_product;
|
||||
bool cpdma_prefetch_writes_memory;
|
||||
bool has_gfx9_scissor_bug;
|
||||
bool has_tc_compat_zrange_bug;
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue