Commit graph

69034 commits

Author SHA1 Message Date
Giuseppe Bilotta
9280f17e82 gallium: remove trailing whitespace in p_screen.h
Signed-off-by: Giuseppe Bilotta <giuseppe.bilotta@gmail.com>

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-03-23 13:25:34 +00:00
Tom Stellard
6e17936bf8 clover: The unit for CL_DEVICE_MEM_BASE_ADDR_ALIGN is bits not bytes
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:22:42 +00:00
Tom Stellard
2b12b1752a clover: Add all the mandatory 1.1 extensions to the extension string
Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:22:42 +00:00
Tom Stellard
96f9cc9181 clover: Add a space at the end of CL_DEVICE_OPENCL_C_VERSION
This is required by the spec.

Reviewed-by: Jan Vesely <jan.vesely@rutgers.edu>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2015-03-23 13:22:42 +00:00
Francisco Jerez
3d1bba7c9b i965/vec4: Fix handling of multiple register reads and writes in dead_code_eliminate().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:52:57 +02:00
Francisco Jerez
2babde35b9 i965/vec4: Calculate live intervals with subregister granularity.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:52:57 +02:00
Francisco Jerez
e6e655ef76 i965/vec4: Define helpers to calculate the common live interval of a range of variables.
These will be especially useful when we start keeping track of
liveness information for each subregister.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:52:49 +02:00
Francisco Jerez
eddb87402e i965/vec4: Define helper functions to convert a register to a variable index.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:13:05 +02:00
Francisco Jerez
ce030a6399 i965/vec4: Don't lose the force_writemask_all flag during CSE.
And set it in the MOV instructions that copy the temporary to the
original destination if the generator instruction had it set.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:13:00 +02:00
Francisco Jerez
1db9c0cd0c i965/vec4: Fix handling of multiple register reads and writes in opt_cse().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:56 +02:00
Francisco Jerez
d041a43c0f i965/vec4: Fix handling of multiple register reads and writes during copy propagation.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:52 +02:00
Francisco Jerez
588859e18c i965/vec4: Fix handling of multiple register reads and writes in split_virtual_grfs().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:48 +02:00
Francisco Jerez
9304f60cbe i965/vec4: Fix handling of multiple register reads and writes in opt_register_coalesce().
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:40 +02:00
Francisco Jerez
74c7e5d351 i965: Define method to check whether a backend_reg is inside a given range.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:36 +02:00
Francisco Jerez
bf6eb37e0b i965/vec4: Remove dependency of vec4_live_variables on the visitor.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:12:13 +02:00
Francisco Jerez
2e7622a487 i965/vec4: Trivial copy propagate clean-up.
Fix typo and punctuation in a comment, break long line and add space
before curly bracket.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
7526ee36bc i965/vec4: Add argument index and type checks to SEL saturate propagation.
SEL saturate propagation already implicitly relies on these
assumptions.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
24073b2cd7 i965/vec4: Fix broken saturate mask check in copy propagation.
try_copy_propagate() was checking the bit of the saturate mask for the
arg-th component of the source to decide whether the whole source
should be saturated (WTF?).  We need to swizzle the original saturate
mask and check that for all enabled channels the saturate flag is
either set or unset, as we cannot saturate a subset of destination
components only.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
18dc59c212 i965/vec4: Don't lose copy propagation saturate bits for not written components.
Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
a3733defbe Revert "i965/vec4: Don't lose the saturate modifier in copy propagation."
This reverts commit 0dfec59a27.  The
change prevented propagation of copies with the saturate flag set,
making the whole saturate mask tracking completely useless.  A proper
fix follows.

Reviewed-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
21c829e5cc i965/vec4: Remove unused method definition.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
516d45f78a i965/vec4: Some more trivial swizzle clean-up.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
430c6bf70e i965/vec4: Improve src_reg/dst_reg conversion constructors.
This simplifies the src_reg/dst_reg conversion constructors using the
swizzle utils introduced in a previous patch.  It also makes them more
useful by changing their semantics slightly: dst_reg(src_reg) used to
set the writemask to XYZW if the src_reg swizzle was anything other
than XXXX, which was almost certainly not what the caller intended if
the swizzle was non-trivial.  After this patch the same components
that are present in the swizzle will be enabled in the resulting
writemask.

src_reg(dst_reg) used to set the first components of the swizzle to
the enabled components of the writemask and then replicate the last
enabled component to fill the swizzle, which, in cases where the
writemask didn't have exactly the first n components set, would in
general not be compatible with the original dst_reg.  E.g.:

| ADD(tmp, src_reg(tmp), src_reg(1));

would *not* do what one would expect (add one to each of the enabled
components of tmp) if tmp didn't have a writemask of the described
form (e.g. YZ, YW, XZW would all fail).  This pattern actually occurs
in many different places in the VEC4 back-end, it's a wonder that it
hasn't caused piglit failures until now.  After this patch
src_reg(dst_reg) will construct a swizzle with each enabled component
at its natural position (e.g. Y at the second position, Z at the
third, and so on).  The resulting swizzle will behave like the
identity when used in any instruction with the original writemask.

I've manually verified that *none* of the callers of both conversion
constructors were relying on the previous broken semantics.  There are
no piglit regressions on any generation.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:33 +02:00
Francisco Jerez
62fd335338 i965/vec4: Pass argument by reference to src_reg/dst_reg conversion constructors.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
23bda945f5 i965/vec4: Remove swizzle_for_size() in favour of brw_swizzle_for_size().
It could be objected that swizzle_for_size() is "faster" than
brw_swizzle_for_size().  It's not measurably better in any reasonable
CPU-bound benchmark on VLV according to the Finnish benchmarking
system (including the SynMark2 DrvShComp shader compilation
benchmark).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
5bcca9f8dc i965/vec4: Remove broken vector size deduction in setup_builtin_uniform_values().
This seemed to be trying to deduce the number of uniform vector
components from the parameter swizzle, but the algorithm would always
give 4 as result.  Instead grab the correct number of components from
the GLSL type.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
132cdcc468 i965/vec4: Simplify visitor handling of swizzles using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
9a17e4e900 i965/vec4: Simplify opt_register_coalesce() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
05ec72d8ec i965/vec4: Simplify reswizzle() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7b30493dc4 i965/vec4: Simplify opt_reduce_swizzle() using the swizzle utils.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
eb9bd3a1b0 i965: Fix signedness of backend_reg::reg_offset.
And make it 16-bit so it packs nicely with the previous field.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7e816c7feb i965/vec4: Fix signedness of dst_reg::writemask.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7678fb9c63 i965/vec4: Don't use GL types in the IR data structures.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
7bc02c786d i965/vec4: Fix signedness of brw_is_single_value_swizzle() argument.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:32 +02:00
Francisco Jerez
cff670b009 i965: Define some useful swizzle helper functions.
This defines helper functions implementing some common swizzle
transformations that are usually open-coded in the compiler back-end,
causing a lot of clutter.  Some optimization passes will become almost
trivial implemented in terms of these functions (e.g.
vec4_visitor::opt_reduce_swizzle()).

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 14:09:29 +02:00
Tapani Pälli
3cf99701ba glsl: fix names in lower_constant_arrays_to_uniforms
Patch changes lowering pass to use unique name for each uniform
so that arrays from different stages cannot end up having same
name.

v2: instead of global counter, use pointer to achieve
    unique name (Kenneth Graunke)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89590
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Cc: 10.5 10.4 <mesa-stable@lists.freedesktop.org>
2015-03-23 11:18:39 +02:00
Jason Ekstrand
a6d4a108d2 i965/nir: Use signed integer type for booleans
FS instructions with NIR on i965:
total instructions in shared programs: 2663561 -> 2619051 (-1.67%)
instructions in affected programs:     1612965 -> 1568455 (-2.76%)
helped:                                5455
HURT:                                  12

FS instructions with NIR on g4x:
total instructions in shared programs: 2352633 -> 2307908 (-1.90%)
instructions in affected programs:     1441842 -> 1397117 (-3.10%)
helped:                                5463
HURT:                                  11

FS instructions with NIR on ilk:
total instructions in shared programs: 3997305 -> 3934278 (-1.58%)
instructions in affected programs:     2189409 -> 2126382 (-2.88%)
helped:                                8969
HURT:                                  22

FS instructions with NIR on hsw (snb and ivb were similar):
total instructions in shared programs: 4109389 -> 4109242 (-0.00%)
instructions in affected programs:     109869 -> 109722 (-0.13%)
helped:                                339
HURT:                                  190

No SIMD16 programs were gained or lost on any platform

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
41d64fa184 i965/nir: Do boolean resolves on GEN <= 5
v2: A couple comment clean-ups from Matt

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
a55af2699f i965: Add a NIR analysis pass for determining when a boolean resolve is needed
v2: Fix the spelling of analyze and re-arrange code for better readability
    as per Connor's comments.
v3: Make the naming of things more consistent and add a pile of comments
v4: Stop trying to avoid vectors

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
2612e569e0 i965/nir: Properly set the predicate on the SEL used in min/max
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
80390f91a0 i965/nir: Use NIR lowering for ffma for gen < 6
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
235c728020 i965/nir: Use emit_lrp for emitting flrp
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-23 01:01:14 -07:00
Jason Ekstrand
a3e05898e9 i965/fs: Make emit_lrp return an fs_inst
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-03-23 01:01:14 -07:00
Dave Airlie
484f9f4fcd i965: define I915_PARAM_REVISION
we are broken against the libdrm 2.4.60 minimum specified,
so fix it for now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-23 09:55:33 +10:00
Jose Fonseca
397b491173 gallivm: Silence unused variable warnings on release builds.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
06ac717810 scons: Silence conversion from 'size_t' to 'type', possible loss of data on MSVC.
Most cases seem harmless, though that might not always be the case.  Maybe
one day we can get gcc to complain about these and fix them throughout
the code, but until then let's silence them.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
15c5595bb1 scons: Ensure inttypes.h is always pre-included on MSVC.
It's a bit hackish couldn't find another solution.  See code comment
for details.   The warning is useful, so universally disabling doesn't
sound a good idea.

Fixes

   warning C4005: 'xxx' : macro redefinition

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
e4d95982ee scons: Silence MSVC C4351 warning.
It warns about change in MSVC behavior -- array initialisation used to
be non-standard, but is standard now, assuming I understand correctly
http://en.cppreference.com/w/cpp/language/zero_initialization .

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
e518d97d7e scons: Match some of LLVM warning options.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00
Jose Fonseca
31e47a59ad scons: Cleanup flex/bison settings specification.
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-03-22 08:23:24 +00:00