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169780 commits

Author SHA1 Message Date
Samuel Pitoiset
907621dc09 radv: disable fast-clears with CMASK for 128-bit formats
This isn't supported according to RadeonSI.

This fixes a piglit test with Zink that uses a R32G32B32A32_SINT format
with MSAA 8x. This is because DCC fast-clears with MSAA require to
clear CMASK too.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7313
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22462>
(cherry picked from commit 0d7912d239)
2023-04-19 14:34:47 +01:00
Erico Nunes
596b623059 Revert "ci: disable lima farm, currently out-of-space, needs to be fixed"
This reverts commit 78644c9bb0.

Fixes: 78644c9bb0 ("ci: disable lima farm, currently out-of-space, needs to be fixed")

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22513>
(cherry picked from commit fdf746cb2b)
2023-04-17 08:58:51 +01:00
Eric Engestrom
d7acb8f043 .pick_status.json: Update to 0d7912d239 2023-04-17 08:58:49 +01:00
Felix DeGrood
1ec9bcd844 anv: disable reset query pools using blorp opt on MTL
This optimization causes some MTL tests to run forever. Not
yet sure why. Disabling optimization until we have a fix.

Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22373>
(cherry picked from commit 0a52002a1c)
2023-04-16 22:38:09 +01:00
Eric Engestrom
f4f4e8186f v3dv/ci: drop fixed failure from fails.txt
Fixes: 8976d8280f ("wsi: remove get_sorted_vk_formats duplication")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22514>
(cherry picked from commit 8ebc5cbe2b)
2023-04-16 22:37:10 +01:00
David Heidelberg
cdedebf839 ci/freedreno: fix the a530_piglit job and switch to Weston
If we count devices which running a530 with mainline kernel and Mesa,
it's probably mostly phones and tablets running on Wayland. Adapt to it.

Fixes: 83c2b26acf ("ci/freedreno: Switch the piglit job to using a deqp-runner suite.")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22255>
(cherry picked from commit 2933976e78)
2023-04-16 22:37:10 +01:00
Karol Herbst
3daf2038d1 rusticl/event: drop work item before updating status
This fixes some CTS compiler tests where they relied on the cl_kernel
object to be released in time so it can recompile a program without
throwing CL_INVALID_OPERATION due to still having active kernel objects.

Fixes: 47a80d7ff4 ("rusticl/event: proper eventing support")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22510>
(cherry picked from commit 60cfe15d79)
2023-04-16 22:37:10 +01:00
Luc Ma
279c4822c5 meson: keep Mako version checking in accord with build msg
Fixes: 52194ae4df ("meson: Ensure that mako is >= 0.8.0")
Signed-off-by: Luc Ma <luc@sietium.com>
Reported-by: Terry Zhang <terry@sietium.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22499>
(cherry picked from commit b5a9021708)
2023-04-16 22:37:10 +01:00
David (Ming Qiang) Wu
2fe4eaa3d0 radeonsi/vcn: add an exception of field case for h264 decoding
This is an error case where the I field has no reference, however
the reference list contains some reference, which resulting in
not be able to find its reference, and it is a correct behavior,
should not enter the correction code. Just add this exception to
prevent such a case, if more exceptions found, they will
be treated indiviually in the future.

Cc: mesa-stable
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8740

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Signed-off-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22485>
(cherry picked from commit bfce57c7a5)
2023-04-16 22:37:10 +01:00
Juan A. Suarez Romero
06d86757d5 v3d: set depth compare function correctly
Depth compare function must be set to the configured one only when
compare mode is enabled; otherwise it must be configured to never.

v2 (Eric):
- Handle V3D < 4.0 case

CC: mesa-stable
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22470>
(cherry picked from commit 82c2258019)
2023-04-16 22:37:10 +01:00
antonino
4ce4823f4e zink: use correct primitives for passthrough gs with tess
When tessellation is used the geometry shader needs to take the
tessellator output primitive as input.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: 90a8525d70 ("zink: handle edgeflags")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22498>
(cherry picked from commit c84989c4cf)
2023-04-16 22:37:10 +01:00
antonino
72969b2c87 zink: don't emulate edgeflags for patches
Patches are used for tessellation, edgeflags don't work with
tessellation.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Fixes: 90a8525d70 ("zink: handle edgeflags")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22498>
(cherry picked from commit 7e6191f605)
2023-04-16 22:37:10 +01:00
Samuel Pitoiset
d43aff3a21 radv: re-emit the guardband state when related PSO are bound
If one of the related states is static, the guardband state needs to be
re-emitted when a graphics pipeline is bound.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8828
Fixes: 40d8df7280 ("radv: emit the guardband state separately from the scissor state")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22472>
(cherry picked from commit ba71b142f8)
2023-04-16 22:37:10 +01:00
Patrick Lerda
7809a85f14 r600: fix refcnt imbalance related to r600_set_vertex_buffers()
For instance, this issue is triggered with: "piglit/bin/useprogram-flushverts-2 -auto -fbo" or
"piglit/bin/primitive-restart-draw-mode line_loop -auto"
while setting GALLIUM_REFCNT_LOG=refcnt.log.

Fixes: 27dcb46629 ("gallium: add take_ownership param into set_vertex_buffers to eliminate atomics")

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22395>
(cherry picked from commit 28cb33fada)
2023-04-16 22:37:09 +01:00
Samuel Pitoiset
bf6c8ee864 radv: try to keep HTILE compressed for READ_ONLY_OPTIMAL layout
It should be handled like DEPTH_STENCIL_READ_ONLY_OPTIMAL.

This fixes an issue with VRS attachment because HTILE was considered
disabled for READ_ONLY_OPTIMAL but there is no reasons to disable it
as long as the image is only used as a depth/stencil attachment.

Otherwise, when HTILE is disabled, VRS rates are ignored.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8675
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22468>
(cherry picked from commit f11a4a09b0)
2023-04-16 22:37:09 +01:00
Samuel Pitoiset
1becf6be48 vulkan: ignore rasterizationSamples when the state is dynamic
Fixes: 1deb83fb86 ("vulkan: Add more dynamic multisample states")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22444>
(cherry picked from commit bdb03ecdd9)
2023-04-16 22:37:09 +01:00
Lionel Landwerlin
4ed3b1ae6b intel/vec4: force exec_all on float control instruction
Applying the same rule as the fs backend so that generation code
doesn't assert.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: daa8003e45 ("intel/fs: use nomask for setting cr0 for float controls")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22473>
(cherry picked from commit 08cf224c4a)
2023-04-16 22:37:09 +01:00
Mike Blumenkrantz
14df131f8f zink: always defer query pool deletion
this feels dumb, but I can't think of a simpler way to do it that
would more accurately handle deletion while also guaranteeing
pool longevity

Fixes: 7da78ffb69 ("zink: create/use query pools dynamically")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
(cherry picked from commit 7119a344f3)
2023-04-16 22:37:08 +01:00
Mike Blumenkrantz
204995f16f zink: pass ctx through query destroy paths
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
(cherry picked from commit 50e3974e25)
2023-04-16 22:36:25 +01:00
Mike Blumenkrantz
f3969bf7df zink: remove atomics from zink_query
this is never accessed from threads anymore and
hasn't been for a long time

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22493>
(cherry picked from commit cb83606279)
2023-04-16 22:36:23 +01:00
Lionel Landwerlin
61d1cdba6e vulkan/runtime: discard unused graphics stages in libraries
Anv is trying to rely on the stages put into the library graphics
state.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22460>
(cherry picked from commit 5dc4212cc1)
2023-04-16 22:17:40 +01:00
Mike Blumenkrantz
3b6c72fa75 mesa/st/program: don't init xfb info if there are no outputs
this is almost certainly a failure case, but drivers still shouldn't
get xfb info if there are no outputs

affects:
spec@glsl-1.50@execution@interface-blocks-api-access-members

cc: mesa-stable

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22448>
(cherry picked from commit a86c710ce5)
2023-04-16 22:17:38 +01:00
Samuel Pitoiset
46ff518ebf radv: fix detecting FMASK_DECOMPRESS/DCC_DECOMPRESS meta pipelines
With the on_demand shaders feature, meta pipelines are only created
when they are used, otherwise they are NULL. Though, inside secondary
cmdbuffers, the graphics pipeline might be also NULL. In this specific
case, radv_is_{dcc,fmask}_decompress_pipeline() would return
TRUE because these pipelines are NULL too...

This fixes flakes with tests that use secondary cmdbuffers with
TC-compat images.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22440>
(cherry picked from commit 0b4e7491f3)
2023-04-16 22:16:17 +01:00
Eric Engestrom
acce8ed144 .pick_status.json: Update to 8ebc5cbe2b 2023-04-16 22:16:15 +01:00
Eric Engestrom
f53f445b97 VERSION: bump for 23.1.0-rc1 2023-04-14 23:08:04 +01:00
Eric Engestrom
117b967321 v3d: disable GL_NV_conditional_render
This feature is supported, but enabling it accidentally enables
OpenGL 3.0 & 3.1, which are not supported.

The feature is enabled in main and discussion to fix the issue is
underway, but we're disabling it in releases until we find a better
solution.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22260>
2023-04-13 23:16:11 +01:00
Qiang Yu
45826e42c5 ac,aco: move gfx10 ngg prim count zero workaround to nir
To simplify both llvm and aco backend and remove unnecessary
workaround code where prim count is known to be not zero.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22381>
2023-04-13 08:12:03 +00:00
Tapani Pälli
b967cbba57 intel/compiler: use intel_needs_workaround for Wa_14012437816
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22437>
2023-04-13 07:33:50 +00:00
Tapani Pälli
ccf16693e1 intel/fs: use intel_needs_workaround for Wa_22013689345
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22437>
2023-04-13 07:33:50 +00:00
Eric Engestrom
1a9727a81e ci/rustfmt: make sure to only check each file once
rustfmt has some magic that follows files (I'm guessing), making files get
checked multiple times with `*.rs`, so let's limit ourselves to `lib.rs`.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22321>
2023-04-13 05:56:53 +00:00
Tatsuyuki Ishi
36fd2bbd98 ci/android: Make armv8's arch aarch64 instead of arm.
Per [1], arm is for 32-bit.

For an upcoming change, we need to detect AArch64 specifically.
Specifying arm in the cross file will result in the wrong build script
behavior.

[1]: https://mesonbuild.com/Reference-tables.html#cpu-families

Reviewed-by: Helen Koike <helen.koike@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22418>
2023-04-13 04:28:29 +00:00
Mike Blumenkrantz
1a63ccc9aa zink: remove a fixed validation error for ci
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22453>
2023-04-13 04:10:32 +00:00
Karol Herbst
55c9356d29 rusticl/program: rework source code tracking
For the CL spec it really matters how a program object was created. We
never really cared all that much, but it didn't support the corner case of
having an empty string as the OpenCL C source code.

Enums feel like the more Rust way to do this kind of stuff anyway.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
6d7b705125 rusticl/program: extract common code of compile and build
The code wasn't all the same, but the build version was wrong, e.g. the
compile flags specified need to be stored even on error.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
d7e9b4ef5b rusticl/program: validate the SPIR-V when created from IL
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8771
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
8fcfc51dad clc: add clc_validate_spirv
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
ab032f4bfd rusticl/program: make IL programs look closer to CLC ones
We want to validate the actual passed in SPIR-V, but we can only report
errors back on build/compile time. So instead of storing the initial IL
in the devices `ProgramBuild` objects, just store it on the Program
instead. This also simplifies setting spec constants as this is only valid
on program directly created from IL and not e.g. linked ones.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
ca1e9917a9 rusticl/program: allow dumping compilation logs through RUSTICL_DEBUG
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
22808d542b rusticl/platform: move device initialization to the platform
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
53025688bb rusticl/platform: move getter into the type
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
3e59a2860e rusticl/platform: rename _cl_platform_id to Platform
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:21 +00:00
Karol Herbst
11250d7a9e rusticl: split platform into core and api parts
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22280>
2023-04-13 02:54:20 +00:00
Samuel Pitoiset
3320eee877 radv: cleanup after splitting radv_pipeline.c
I moved to many things to radv_pipeline_graphics.c without checking.

Fixes: 7783b7f697 ("radv: split radv_pipeline.c into radv_pipeline_{compute,graphics}.c")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22441>
2023-04-13 02:21:44 +00:00
Vitaliy Triang3l Kuzmin
30d141ba63 r600: Alpha to coverage dithering on Evergreen+
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22384>
2023-04-13 02:07:52 +00:00
Alyssa Rosenzweig
7a7d374ac3 pan/decode: Print compute job payloads
Noticed while debugging OpenCL. I think this was fallout from the CSF decode
rework?

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
2023-04-13 01:49:33 +00:00
Alyssa Rosenzweig
de01ae120d panfrost: Allocate shared memory in OpenCL
In OpenCL, we can have no shader-defined shared memory but some dispatch-time
variable memory. This is not reflected in ss->info.wls_size, so check the right
variable instead so we allocate the appropriate memory.

Fixes page faults accessing shared memory with Rusticl, e.g. in the vstore_local
test.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
2023-04-13 01:49:33 +00:00
Alyssa Rosenzweig
2f2738dc90 pan/bi: Use nir_lower_mem_access_bit_sizes
OpenCL can generate large loads and stores that we can't support, so we need to
lower. We can load/store up to 128-bits in a single go. We currently only handle
up to 32-bit components in the load and no more than vec4, so we split up
accordingly.

It's not clear to me what the requirements are for alignment on Valhall, so we
conservatively generate aligned access, at worst there's a performance penalty
in those cases. I think unaligned access is suppoerted, but likely with a
performance penalty of its own? So in the absence of hard data otherwise, let's
just use natural alignment.

Oddly, this shaves off a tiny bit of ALU in a few compute shaders on Valhall,
all in gfxbench. Seems to just be noise from the RA lottery.

total instructions in shared programs: 2686768 -> 2686756 (<.01%)
instructions in affected programs: 584 -> 572 (-2.05%)
helped: 6
HURT: 0
Instructions are helped.

total cvt in shared programs: 14644.33 -> 14644.14 (<.01%)
cvt in affected programs: 5.77 -> 5.58 (-3.25%)
helped: 6
HURT: 0

total quadwords in shared programs: 1455320 -> 1455312 (<.01%)
quadwords in affected programs: 56 -> 48 (-14.29%)
helped: 1
HURT: 0

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
2023-04-13 01:49:33 +00:00
Alyssa Rosenzweig
934b0f1add pan/bi: Respect swizzles for more vector ops
We need to respect the ALU swizzle, this takes a vector. Fixes incorrect
pack_64_2x32 translation hit when wiring up lower_mem_access_bit_sizes for
OpenCL.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
2023-04-13 01:49:33 +00:00
Alyssa Rosenzweig
d00d2ae701 pan/bi: Lower swizzles for 8-bit CSEL
With OpenCL we can generate stuff like CSEL.u32.eq r0.b0000, we need to handle
it when lowering swizzles.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22228>
2023-04-13 01:49:33 +00:00
Lionel Landwerlin
66edd030ab anv: add utrace tracking of frame boundaries
Based on vkQueuePresentKHR calls. It just helps spotting the beginning
end of a frame in perfetto when apps are using 3/4 command buffers per
frame.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22276>
2023-04-13 01:14:38 +00:00