intel/vec4: force exec_all on float control instruction

Applying the same rule as the fs backend so that generation code
doesn't assert.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: daa8003e45 ("intel/fs: use nomask for setting cr0 for float controls")
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22473>
(cherry picked from commit 08cf224c4a)
This commit is contained in:
Lionel Landwerlin 2023-04-13 19:34:15 +03:00 committed by Eric Engestrom
parent 14df131f8f
commit 4ed3b1ae6b
2 changed files with 3 additions and 2 deletions

View file

@ -589,7 +589,7 @@
"description": "intel/vec4: force exec_all on float control instruction",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "daa8003e45c37d13f81958c0a74222e259d18538"
},

View file

@ -1363,7 +1363,8 @@ vec4_visitor::emit_shader_float_controls_execution_mode()
unsigned execution_mode = this->nir->info.float_controls_execution_mode;
if (nir_has_any_rounding_mode_enabled(execution_mode)) {
brw_rnd_mode rnd = brw_rnd_mode_from_execution_mode(execution_mode);
emit(SHADER_OPCODE_RND_MODE, dst_null_ud(), brw_imm_d(rnd));
const vec4_builder bld = vec4_builder(this).at_end();
bld.exec_all().emit(SHADER_OPCODE_RND_MODE, dst_null_ud(), brw_imm_d(rnd));
}
}