Commit graph

16466 commits

Author SHA1 Message Date
Qiang Yu
dff14d102d aco: fix voffset missing when buffer store base >=4096
Regression on test:
  dEQP-GLES31.functional.geometry_shading.basic.output_256

voffset is missing if buffer store base >=4096, we need to
re-calculate offen after resolve_excess_vmem_const_offset().

Fixes: cdaf269924 ("aco: inline store_vmem_mubuf/emit_single_mubuf_store")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32767>
2024-12-24 01:42:45 +00:00
Samuel Pitoiset
2c323f2b8c radv: rename color output state to fragment output state
Now that it also exports depth.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32675>
2024-12-23 08:09:26 +00:00
Samuel Pitoiset
47dc9ca512 radv: rework emitting SPI_SHADER_Z_FORMAT
This fixes a small issue when the Z format in PS epilogs change, like
when alpha-to-coverage is enabled and then disabled.

igned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32675>
2024-12-23 08:09:26 +00:00
Daniel Schürmann
28a214728c ac/lower_ngg: move readlane into break blocks in streamout code generation for gfx12/ACO
This avoids unnecessary shuffle code and s_wait_loadcnt.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32743>
2024-12-21 12:32:25 +00:00
Daniel Schürmann
47227089d6 ac/lower_ngg: move break blocks after loop in streamout code generation for gfx12/ACO
By inverting the break condition, the loop becomes shorter.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32743>
2024-12-21 12:32:25 +00:00
Daniel Schürmann
39dcd9dedb ac/lower_ngg: Fix collecting buffer offsets from 4 lanes on gfx12
Also use readlane for improved performance.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32743>
2024-12-21 12:32:25 +00:00
Samuel Pitoiset
a7d0f0b30e radv: check descriptor indexing features for enabling the global BO list
It's more accurate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32718>
2024-12-20 07:43:59 +00:00
Samuel Pitoiset
62edab4cac radv: cleanup enabling the global BO list when BDA is used
VK_{EXT,KHR}_buffer_device_address are redundant with the
bufferDeviceAddress feature.

VK_KHR_ray_tracing_pipeline depends on VK_KHR_acceleration_structure
which also depends on the bufferDeviceAddress feature.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32718>
2024-12-20 07:43:59 +00:00
Erik Faye-Lund
3b94bd03c2 radv: use vk_descriptor_type_is_dynamic
No need to open-code this one now that we have a generic helper.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32627>
2024-12-19 15:12:58 +00:00
Samuel Pitoiset
0b3e7ec36f radv/nir: simplify lowering of query intrinsics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32702>
2024-12-19 08:08:53 +00:00
Samuel Pitoiset
a7d32be1dd radv: rename GDS queries to emulated queries
Emulated is more generic than GDS. GDS will be replaced with SSBO
atomics anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32702>
2024-12-19 08:08:53 +00:00
Samuel Pitoiset
db5d57e95e radv: fix getting the number of vertices per prim for the last VGT stage
This is only valid for VS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32701>
2024-12-19 07:46:28 +00:00
Samuel Pitoiset
3939214906 radv/nir: fix checking if task shader invocations query is enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32701>
2024-12-19 07:46:28 +00:00
Samuel Pitoiset
91cdee8a38 radv: only enable emulated mesh/task shader queries on GFX10.3
It's not emulated on GFX11+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32701>
2024-12-19 07:46:28 +00:00
Marek Olšák
4d8a508510 ac/nir: call nir_gather_tcs_info only once for RADV
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
8c2f9f0665 radv: switch to the new TCS LDS/offchip size computation
to use the same logic as radeonsi. This could be improved, see TODOs.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
3056bf1cb1 ac/nir: add new helpers for computing the TCS LDS/offchip size accurately
This is based on how the HS lowering passes address TCS inputs and
outputs. The new LDS size is lower in some cases.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
85c20def94 ac,radv,radeonsi: enable TCS input reads from VGPRs for all compatible loads
Cross-invocation TCS input access doesn't prevent same-invocation access.
This improves shaders that use both for the same inputs.

Also, if some components of a vec4 slot only use same-invocation access and
other components only use cross-invocation access (it's possible after
compaction), this takes the VGPR path for the components with
same-invocation access, which didn't happen previously because all masks
only describe whole vec4s.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
99a03dc9d5 ac/nir: allow a TCS input to be available from both VGPRs and LDS
Both can be used. Cross-invocation access can read it from LDS, while
same-invocation access can read it from VGPRs.

The entrypoints of the passes don't allow that flexibility yet,
but the logic inside the pass allows it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
b49eab68a8 ac/nir: use s_sendmsg(HS_TESSFACTOR) to optimize writing tess factors for gfx11
This uses the new shader message. It eliminates memory stores and latency
for simple cases of tess level values.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
f4eebb373c ac/nir: reserve the first LDS vec4 for the HS tf0/1 group vote in TCS
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Valentine Burley
61d9c47944 ci/lava: Use CI_JOB_TIMEOUT instead of separate variable
The CI_JOB_TIMEOUT variable is the GitLab-defined job timeout in
seconds.
Use this variable in LAVA instead of the separate JOB_TIMEOUT,
which was intended to represent the test phase timeout (job timeout
minus 5 minutes), but was often overlooked.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32609>
2024-12-18 09:23:27 +00:00
Samuel Pitoiset
2e1c87c1ca radv: add few more query helpers for copying results
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32678>
2024-12-18 07:51:57 +00:00
Samuel Pitoiset
5b53f6deaa radv: remove dead code in radv_CmdCopyQueryPoolResults()
Incrementing dest_va doesn't do anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32678>
2024-12-18 07:51:57 +00:00
Samuel Pitoiset
ebe9dc49b7 radv: reorganize query code by adding separate begin/end helpers
The query code is getting big and complex over time. It will be even
more complicated because GDS doesn't exist on GFX12. Let's reorganize
slightly to make it more readable and easier to maintain.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32678>
2024-12-18 07:51:57 +00:00
Samuel Pitoiset
6e59778e5d radv: fix capturing RT pipelines that return VK_OPERATION_DEFERRED_KHR for RGP
This isn't an error.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32683>
2024-12-17 17:12:27 +00:00
Samuel Pitoiset
0223f0f54d radv: fix missing variants for the last VGT stage with shader object
Last VGT stages (VS, TES or GS) can always be used with a null FS when
nextStage is non-zero. Like if a VS is created with nextStage=TCS, it's
also allowed to draw without binding a CTS (ie. nextStage=None is always
a valid case).

Because we don't want to compile two variants for NONE and FRAGMENT,
let's compile only the FRAGMENT one when necessary.

Fixes new CTS coverage, see https://gerrit.khronos.org/c/vk-gl-cts/+/15976.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32665>
2024-12-17 09:50:52 +00:00
Samuel Pitoiset
5ad025b675 radv/ci: fix expected list of failures for TAHITI
DGC tests are skipped.

Fixes: dda03a21d6 ("Revert "radv: fix creating unlinked shaders with ESO when nextStage is 0"")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32672>
2024-12-17 09:49:14 +01:00
Valentine Burley
0615b92c23 radv/ci: Use deqp-vk-main in Raven and Stoney RADV jobs
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32647>
2024-12-17 07:23:03 +00:00
Marek Olšák
cdecbee922 radeonsi/gfx12: adjust HiZ/HiS logic
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:28 +00:00
Marek Olšák
e3cef02c24 radeonsi/gfx12: set DB_RENDER_OVERRIDE based on stencil state
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:28 +00:00
Marek Olšák
8328e57512 ac/surface/gfx12: enable DCC 256B compressed blocks and reorder modifiers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:27 +00:00
Marek Olšák
e6345e2fd3 ac: update SPI_GRP_LAUNCH_GUARANTEE_* register values for gfx12
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:27 +00:00
Samuel Pitoiset
dda03a21d6 Revert "radv: fix creating unlinked shaders with ESO when nextStage is 0"
This reverts commit d4ccae739b.

This is actually unnecessary. nextStage=0 means it's the last stage.
Looks like the specification was too vague and we misinterpreted it.

It's going to be clarified and VKCTS will be fixed, see
https://gitlab.khronos.org/vulkan/vulkan/-/issues/4115 for more info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32629>
2024-12-16 19:31:57 +01:00
Samuel Pitoiset
0943f616d1 radv: report same buffer aligment for DGC preprocessed buffer
It makes sense to report the same alignment.

This fixes new VKCTS coverage.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32626>
2024-12-16 14:53:56 +00:00
You, Min-Hsuan
22ff26a0be amd/vpelib: fix coverity defects
\[WHY\]
The reason for making these changes is to address the defects identified
by the Coverity scan. By fixing these defects, we can ensure that any
future defects generated by our own code changes can be easily
identified and resolved.

\[HOW\]
To implement the changes/fixes, the following steps were taken:

1. CHECKED_RETURN: All cases were aligned to check the return value.
2. DC.WEAK_CRYPTO: The use of rand() to generate random numbers was
replaced with a more secure method using platofrm API.
3. DEADCODE: Useless code that always returned true was removed.
4. DIVIDE_BY_ZERO: A check was added to ensure that the divisor is not
zero before performing division.
5. HFA: An unused header was removed.
6. MISSING_BREAK: A break statement was added in switch cases where it
was missing.
7. PASS_BY_VALUE: Parameters that were being passed by value and were
too big were changed to pass by reference.

\[TESTING\]
What testings have been done (test IDs and json file):

Reviewed-by: Tomson Chang <Tomson.Chang@amd.com>
Signed-off-by: Min-Hsuan You <Min-Hsuan.You@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32646>
2024-12-16 08:13:40 +00:00
Koo, Anthony
54c4accdb1 amd/vpelib: Add system event logging
\[WHY\]
System event logs are different than string logging. They are meant to
generate light weight events with ID and variable args and can be
coalesced with events generated by other IP components.

\[HOW\]
Add a callback function, which is implemented by the client (Like PAL)

VPELIB adds defines for a list of possible event IDs

The client is expected to handle the callback
And translate and emit the event through
native system infrastructure like ETW logging.

\[TESTING\]
Tested on system that triggers sys event, and viewed the event through
ETW viewer

Signed-off-by : Anthony Koo <anthony.koo@amd.com>

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32646>
2024-12-16 08:13:40 +00:00
Zhao, Jiali
fe58bb70e6 amd/vpelib: 420 and 422 Output Single Segment cositing support
fix the style complaint
add 709 jfif color space handling

Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Signed-off-by: Jiali Zhao <Jiali.Zhao@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32646>
2024-12-16 08:13:40 +00:00
Visan, Tiberiu
b06ee9074d amd/vpelib: fixed file headers for Palamida scan
\[WHY\]
Some header files in VPE lib did not have the proper copyright header

\[HOW\]
Proper copyrights were put in place

Reviewed-by: Roy Chan <roy.chan@amd.com>
Co-authored-by: Tiberiu Visan <tvisan@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32646>
2024-12-16 08:13:40 +00:00
Leder, Brendan Steve
4ef45d8d4e amd/vpelib: Move bg color
Refactor bg gen as it check_bg_support simply calls into other version specific function.
Move that function directly into check_bg_support call, and refactor unnecessary functions + format fix.

Co-authored-by: Brendan <breleder@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Reviewed-by: Navid Assadian <Navid.Assadian@amd.com>
Acked-by: Chenyu Chen <Chen-Yu.Chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32646>
2024-12-16 08:13:40 +00:00
Marek Olšák
3943ed8199 ac/lower_ngg: improve streamout code generation for gfx12/ACO to match LLVM
ACO is still not perfect:
* It generates s_wait_loadcnt 0x0-0x3 when the only required wait instruction
  is s_wait_loadcnt 0x5.
* It generates a lot of unnecessary jumps and blocks for uniform loop breaks.
  Only scc1 jumps are necessary to break the loop. This is 10x better than
  LLVM, but even ACO might consider using nir_intrinsic_ordered_add_loop_gfx12_amd
  for the best performance.

How to print the streamout asm on any GPU:
    PIGLIT_PLATFORM=gbm AMD_FORCE_FAMILY=gfx12_16pipe AMD_DEBUG=vs,mono,asm,useaco ../piglit/bin/shader-io-rate vs_out_xfb

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32570>
2024-12-16 07:35:07 +00:00
Qiang Yu
d38efee8ef aco: enable gfx12 support for radeonsi
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32570>
2024-12-16 07:35:07 +00:00
Qiang Yu
b14cc34415 ac/surf: add more modifiers to gfx12 supported list
OpenGL will export these modifiers for various sized
textures.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32570>
2024-12-16 07:35:06 +00:00
Qiang Yu
b3a218d444 ac/surface/tests: support all block sizes
We are going to add more modifiers.

GFX9 has 4K DCC and non-DCC modifiers while others only have
4K non-DCC modifiers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32570>
2024-12-16 07:35:06 +00:00
Samuel Pitoiset
1291981ebd radv: mark HAWAII (GFX7) as Vulkan 1.3 conformant
https://www.khronos.org/conformance/adopters/conformant-products#submission_848

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32620>
2024-12-13 13:32:38 +00:00
Valentine Burley
680885d57e radv/ci: Convert Valve RADV jobs to deqp-runner suites
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32558>
2024-12-13 09:36:08 +00:00
Friedrich Vock
0c02a7e8e8 radv/rt: Remove nir_intrinsic_execute_callable instrs in monolithic mode
It's allowed to place OpExecuteCallableKHR in a SPIR-V, even if the RT
pipeline doesn't contain any callable shaders. Unreal hits this case and
crashes. We can assume the intrinsic never gets executed, so we can
simply remove it.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32613>
2024-12-13 01:50:58 +00:00
Samuel Pitoiset
c7a7f0244f radv: add radv_lower_terminate_to_discard and enable for Indiana Jones
To workaround game bug.

This fixes the rendering issue with eyes.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32606>
2024-12-12 19:54:39 +00:00
Timur Kristóf
deab81fb0d radv: Configure implicit VS primitive ID to be per-primitive.
This is beneficial to applications that rely on
the implicit primitive ID from VS.

- We don't have to disable provoking vertex reuse,
  which results in more efficient vertex processing.
- There is no LDS access needed to export the primitive ID,
  because it is already available to GS threads.
- As a consequence of not needing LDS, we can use this
  together with NGG passthrough mode.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32270>
2024-12-12 18:11:47 +00:00
Timur Kristóf
95ac0f8d76 radv: Reorder FS primitive ID input after layer and viewport.
We want to make the implicit VS primitive ID a per-primitive
output attribute, which means that this has to be last.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32270>
2024-12-12 18:11:47 +00:00