Commit graph

6262 commits

Author SHA1 Message Date
Samuel Pitoiset
5ba1a61648 ac/shader: gather If TES reads TESSINNER or TESSOUTER
This shouldn't be scanned in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-01-15 11:51:47 +01:00
Samuel Pitoiset
aebde47840 ac: remove ac_shader_variant_info::fs::output_mask
Unused.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-01-15 11:48:42 +01:00
Timothy Arceri
e6378962ce ac: add doubles support to isign
Fixes a number of int64 piglit tests, for example:

generated_tests/spec/arb_gpu_shader_int64/execution/built-in-functions/fs-sign-i64vec2.shader_test

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-14 11:40:03 +11:00
Timothy Arceri
38876c88d1 ac: add i64_0 and i64_1 to llvm build context
These will be used in the following patch.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-14 11:40:03 +11:00
Timothy Arceri
741b21b713 ac/nir: fix translation of nir_op_b2i for doubles
V2: just zero-extend the 32-bit value.

Fixes a number of int64 piglet tests, for example:

generated_tests/spec/arb_gpu_shader_int64/execution/conversion/frag-conversion-explicit-bool-int64_t.shader_test

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-14 11:40:03 +11:00
Timothy Arceri
f0d74ecce8 radv/radeonsi/nir: lower 64bit flrp
Fixes a bunch of arb_gpu_shader_fp64 piglit tests for example:

generated_tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-mix-double-double-double.shader_test

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-13 18:04:40 +11:00
Samuel Pitoiset
0eb30d81c4 ac: add 'const' qualifiers to the shader info pass
For clarification purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:21 +01:00
Samuel Pitoiset
20f7f9a328 ac: remove unused ac_nir_compiler_options from gather_info_input_decl()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-12 12:25:19 +01:00
Dave Airlie
ad11fc3571 radv: don't emit unneeded vertex state.
If the number of instances hasn't changed and we've already
emitted it, don't emit it again.

If the vertex shader is the same and the first_instance, vertex_offset
haven't changed don't emit them again.

This increases the fps in GL_vs_VK -t 1 -m -api vk from around 40
to around 60 here, it may not impact anything else.

Dieter also reported smoketest going from 1060->1200 fps.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-12 00:43:07 +00:00
Dave Airlie
e37db93246 radv: trim buffer load result (fixes dota2)
Running dota2 since the below commit crashes with an llvm assert.

Trim the vector like the other user. This possible could also be
avoided by not padding inside the load vec3->vec4.

Fixes: 41c36c4549 (amd/common: use ac_build_buffer_load() for emitting UBO loads)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2018-01-12 00:41:55 +00:00
Dylan Baker
2083a14179 meson: Use dependencies for nir
This creates two new internal dependencies, idep_nir_headers and
idep_nir. The former encapsulates the generation of nir_opcodes.h and
nir_builder_opcodes.h and adding src/compiler/nir as an include path.
This ensures that any target that needs nir headers will have the
includes and that the generated headers will be generated before the
target is build. The second, idep_nir, includes the first and
additionally links to libnir.

This is intended to make it easier to avoid race conditions in the build
when using nir, since the number of consumers for libnir and it's
headers are quite high.

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
8e981eb2b7 meson: Use include variables
These were added after adderlib was mesonified, but it still good to use
them instead of open coding them.

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Dylan Baker
fbf192a67e meson: Use consistent style
Currently the meosn build has a mix of two styles:
arg : [foo, ...
       bar],

and
arg : [
  foo, ...,
  bar,
]

For consistency let's pick one. I've picked the later style, which I
think is more readable, and is more common in the mesa code base.

v2: - fix commit message

Acked-by: Eric Engestrom <eric.engestrom@imgtec.com>
Signed-off-by: Dylan Baker <dylan.c.baker@intel.com>
2018-01-11 15:40:02 -08:00
Timothy Arceri
30c1a93f6d ac/nir: fix translation of nir_op_fsign for doubles
Without this we end up with the llvm error message:

"Both operands to a binary operator are not of the same type!"

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:18 +11:00
Timothy Arceri
d7b6b8ba52 ac: add f64_0 to the llvm build context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:18 +11:00
Timothy Arceri
7b971c828a ac/nir: fix translation of nir_op_frcp for doubles
Without this we end up with the llvm error message:

"Both operands to a binary operator are not of the same type!"

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:18 +11:00
Timothy Arceri
24575c815c ac/nir: fix translation of nir_op_frsq for doubles
Without this we end up with the llvm error message:

"Both operands to a binary operator are not of the same type!"

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:17 +11:00
Timothy Arceri
c0eb304acd ac: add f64_1 to the llvm build context
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-12 09:29:17 +11:00
Bas Nieuwenhuizen
b9f4c615f8 radv: reset semaphores & fences on sync_file export.
Per spec:

"Additionally, exporting a fence payload to a handle with copy transference has the same side effects
on the source fence’s payload as executing a fence reset operation. If the fence was using a
temporarily imported payload, the fence’s prior permanent payload will be restored."

And similar for semaphores:

"Additionally, exporting a semaphore payload to a handle with copy transference has the same side
effects on the source semaphore’s payload as executing a semaphore wait operation. If the
semaphore was using a temporarily imported payload, the semaphore’s prior permanent payload
will be restored."

Fixes: 42bc25a79c "radv: Advertise sync fd import and export."
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-11 21:56:13 +01:00
Timothy Arceri
c797cd605a ac: add load_patch_vertices_in() to the abi
Fixes the follow test for radeonsi nir:

tests/spec/arb_tessellation_shader/execution/quads.shader_test

Also stops 8 other tests from crashing, they now just fail e.g.

tcs-output-array-float-index-rd-after-barrier.shader_test

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-11 14:28:37 +11:00
Bas Nieuwenhuizen
67e09c8b45 ac/nir: Sanitize location_frac for local variables.
If they were promoted from inputs/outputs, they could have a
non-zero value left over, which messed with our store handling.

Fixes: 06f05040eb "radv: Link shaders."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2018-01-11 00:56:52 +01:00
Samuel Pitoiset
41c36c4549 amd/common: use ac_build_buffer_load() for emitting UBO loads
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 19:02:27 +01:00
Samuel Pitoiset
7239e265eb amd/common: import get_{load,store}_intr_attribs() from RadeonSI
v2: move those helpers to the header and use static inline

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> (v1)
2018-01-10 19:02:23 +01:00
Bas Nieuwenhuizen
d0ef3d4bb0 radv: Remove some typos.
Trivial.
2018-01-10 13:26:27 +01:00
Bas Nieuwenhuizen
5db0bf9994 radv: Implement VK_EXT_discard_rectangles.
Tested with a modified deferred demo and no regressions in a 1.0.2
mustpass run.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-10 13:26:22 +01:00
Bas Nieuwenhuizen
11b9cdd2d7 radv: Add mapping between dynamic state mask and external enum.
The EXT values are really large, e.g.
VK_DYNAMIC_STATE_DISCARD_RECTANGLE_EXT = 1000099000, so 1 << value
is not going to fit into a 32-bit mask.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2018-01-10 13:24:31 +01:00
Samuel Pitoiset
7145b20afb amd/common: bump the number of available user SGPRS to 32 on GFX9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:35:08 +01:00
Samuel Pitoiset
a1f1f708c0 radv: remove radv_pipeline_layout::push_constant_stages field
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:57 +01:00
Samuel Pitoiset
d43f50c00b amd/common: do not rely on the pipeline for the push constants logic
It makes more sense to rely on nir_intrinsic_load_push_constant
instead of the pipeline layout.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:54 +01:00
Samuel Pitoiset
4e701cf75c radv/gfx9: calculate the number of ES VGPRs for merged shaders
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:53 +01:00
Samuel Pitoiset
232c418af5 radv/gfx9: enable LDS for GS only if the ES type is TES
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:51 +01:00
Samuel Pitoiset
9e2395faf5 amd/common: determine the ES type (VS or TES) for the GS on GFX9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-10 12:31:49 +01:00
Timothy Arceri
f04d2ca0d9 ac: rework emit_barrier() to not segfault on radeonsi
nir_to_llvm_context will always be NULL for radeonsi so we need
work around this.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-09 10:21:32 +11:00
Timothy Arceri
19f3141e6a ac: add load_tess_level() to the abi
Fixes the following piglit tests in radeonsi:

vs-tcs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tcs-tes-tessinner-tessouter-inputs-tris.shader_test
vs-tes-tessinner-tessouter-inputs-quads.shader_test
vs-tes-tessinner-tessouter-inputs-tris.shader_test

v2: make use of si_shader_io_get_unique_index_patch()
    via the helper in the previous patch rather than
    shader_io_get_unique_index()

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> (v1)
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-09 10:21:32 +11:00
Samuel Pitoiset
08a5f4412a radv: get InstanceID from VGPR1 (or VGPR2 for tess) instead of VGPR3
VGPR1 = InstanceID / StepRate0; // StepRate0 can be set to 1

Ported from RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:30:01 +01:00
Samuel Pitoiset
be16bbe1d3 radv: avoid PS partial flushes when viewports/scissors don't change
For Vega10 and Raven that need a special workaround for the
scissor bug.

This seems to give a minor boost for Talos and Dota 2, at least.

To reduce the cost of memcmp, the driver checks if it's
really useful to do the comparison.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:58 +01:00
Samuel Pitoiset
b09b3f8834 radv: add has_scissor_bug for Vega10 and Raven
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:56 +01:00
Samuel Pitoiset
b462ceb482 radv/gfx9: do not load VGPR1 when GS uses points or lines
VGPR1 is only needed for topology that needs 3 offsets like
triangles or quads.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:53 +01:00
Samuel Pitoiset
a3c2a86757 radv: make shader BOs read-only for the GPU
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:51 +01:00
Samuel Pitoiset
6e3459eaf4 radv: make descriptor BOs read-only for the GPU
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:49 +01:00
Samuel Pitoiset
e4f2ad403f radv: make the indirect GFX config BO read-only for the GPU
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:47 +01:00
Samuel Pitoiset
0e84fc2e2b radv/winsys: make IBs read-only for the GPU
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:45 +01:00
Samuel Pitoiset
a3aaa03624 radv/winsys: add RADEON_FLAG_READ_ONLY
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:43 +01:00
Samuel Pitoiset
2dab5e96ec radv/winsys: rework radv_amdgpu_bo_va_op()
Needed for the following commit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-08 21:24:41 +01:00
Marek Olšák
a140aeb619 ac: add ac_build_fmin/fmax helpers
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2018-01-06 09:51:43 +01:00
Samuel Pitoiset
87efa71001 radv: remove unused radv_color_buffer_info::cb_clear_valueX
Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-05 17:26:51 +01:00
Samuel Pitoiset
ec63ab39be radv: enable denorms for 64-bit and 16-bit floats
Similar to RadeonSI.

This fixes:
dEQP-VK.image.texel_view_compatible.graphic.basic.attachment_read.bc*r16g16b16a16_sfloat
dEQP-VK.image.extended_usage_bit.attachment_write.r16_sfloat

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-05 09:51:33 +01:00
Samuel Pitoiset
7643c71527 amd/common: correctly detect if we need ring buffers
When allocate_user_sgprs() was called, ctx->stage was actually
unset and 0 is for the vertex shader. This doesn't change
anything for now because of the spill support thing.

Though, the number of user SGPRs has to be fixed for merged
shaders on GFX9. It was broken before anyway.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-05 09:49:51 +01:00
Samuel Pitoiset
50cfad0298 amd/common: use ac_image_load when lod is zero
This might decrease VGPR spilling, because we no longer
have to use v4i32 for 2D fetches when level == 0. We now
use v2i32 for those cases.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2018-01-05 09:49:45 +01:00
Samuel Pitoiset
85769759bf radv: limit the scissor bug workaround to Vega 10 and Raven
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2018-01-05 09:47:49 +01:00