Commit graph

25 commits

Author SHA1 Message Date
Alyssa Rosenzweig
ba0f28ad8b asahi: rm layered bit from shader key
Just always use layered, like AGXV. This was a pointless bit of optimization
that only affects render target spilling with neglible impact.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
8d451fe9f2 asahi: fix integer RT clamping
fixes the rest of KHR-GL33.packed_pixels.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26614>
2023-12-09 12:08:39 -04:00
Alyssa Rosenzweig
111e526f19 agx: Allow drivers to lower texture handles
Rather than hardcoding u0_u1, this lets drivers map texture handles in whatever
way is convenient. In particular, this makes textures work properly with merged
shader stages (provided one of the stages is forced to use bindless access), by
giving each stage an independent texture heap.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26056>
2023-11-07 00:05:55 +00:00
Alyssa Rosenzweig
019a52fff0 asahi: Clamp 8-bit integer RTs
Fixes gl-3.0-render-integer.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26056>
2023-11-07 00:05:54 +00:00
Alyssa Rosenzweig
8a48af4f8f agx/lower_tilebuffer: Support spilled layered RTs
If we spill render targets with a layered framebuffer, our spilled targets are
assumed to be 2D Arrays (in general). We need to use arrayed image operations to
load/store from these. The layer is given by the layer as read in the fragemnt
shader. This handles the eMRT portion of layered rendering.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2023-10-01 12:37:55 -04:00
Alyssa Rosenzweig
88fd76d378 asahi: Add helper to get layer id in internal program
For background/EOT only.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2023-10-01 12:32:12 -04:00
Alyssa Rosenzweig
a2e5d1ddd1 asahi: Force translucency for ignored render targets
If we bound 4 render targets but we only write to 1 of them, the other 3 need
their contents preserved. This requires either properly configuring HSR to
implement colour masking (TODO) or using the big hammer of setting TRANSLUCENT.
This patch picks the latter for now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25052>
2023-09-05 18:50:34 +00:00
Alyssa Rosenzweig
a58bb49fc0 asahi: Fixes for clang-warnings
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25052>
2023-09-05 18:50:34 +00:00
Alyssa Rosenzweig
f80c57c38f treewide: Use nir_before/after_impl for more elaborate cases
Via Coccinelle patch:

    @@
    expression func_impl;
    @@

    -nir_before_block(nir_start_block(func_impl))
    +nir_before_impl(func_impl)

    @@
    expression func_impl;
    @@

    -nir_after_block(nir_impl_last_block(func_impl))
    +nir_after_impl(func_impl)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24910>
2023-08-30 19:30:58 +00:00
Alyssa Rosenzweig
1d77fb967d nir,asahi: Remove texture_base_agx
Doing a descriptor crawl with binding tables requires a real binding table in
the shader, which won't work for VK or merged shader stages in GL. Instead,
let's lower anything that needs a crawl to bindless in the driver, so the
compiler code doesn't need to know anything about descriptor binding models.
That gets rid of the texture_base_agx sysval, which is problematic when there
are multiple descriptor sets worth of textures.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
2023-08-23 15:06:55 +00:00
Faith Ekstrand
4695bebc79 nir: Drop nir_dest
Instead, we replace every use of it with nir_def.  Most of this commit
was generated by sed:

   sed -i -e 's/dest.ssa/def/g' src/**/*.h src/**/*.c src/**/*.cpp

A few manual fixups were required in lima and the nir_legacy code.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
2023-08-14 21:22:53 +00:00
Faith Ekstrand
80a1836d8b nir: Get rid of nir_dest_bit_size()
We could add a nir_def_bit_size() helper but we use ->bit_size about 3x
as often as nir_dest_bit_size() today so that's a major Coccinelle
refactor anyway and this doesn't make it much worse.  Most of this
commit was generated byt the following semantic patch:

    @@
    expression D;
    @@

    <...
    -nir_dest_bit_size(D)
    +D.ssa.bit_size
    ...

Some manual fixup was needed, especially in cpp files where Coccinelle
tends to give up the moment it sees any interesting C++.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24674>
2023-08-14 21:22:53 +00:00
Alyssa Rosenzweig
09d31922de nir: Drop "SSA" from NIR language
Everything is SSA now.

   sed -e 's/nir_ssa_def/nir_def/g' \
       -e 's/nir_ssa_undef/nir_undef/g' \
       -e 's/nir_ssa_scalar/nir_scalar/g' \
       -e 's/nir_src_rewrite_ssa/nir_src_rewrite/g' \
       -e 's/nir_gather_ssa_types/nir_gather_types/g' \
       -i $(git grep -l nir | grep -v relnotes)

   git mv src/compiler/nir/nir_gather_ssa_types.c \
          src/compiler/nir/nir_gather_types.c

   ninja -C build/ clang-format
   cd src/compiler/nir && find *.c *.h -type f -exec clang-format -i \{} \;

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24585>
2023-08-12 16:44:41 -04:00
Alyssa Rosenzweig
ff16397912 asahi: Lower tilebuffer access for spilled RTs
Conceptually similar, we just don't have the tilebuffer available this time.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
2023-07-20 15:33:28 +00:00
Alyssa Rosenzweig
66e8afe7c9 asahi: Extract some tilebuffer lowering code
In prep for spilling. No functional change.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
2023-07-20 15:33:28 +00:00
Alyssa Rosenzweig
6bc42054d1 asahi: Introduce concept of spilled render targets
To accommodate framebuffers which exceed tilebuffer limits, we'll need to spill
render targets to main memory. In effect, we need to emulate an immediate-mode
renderer for some render targets. This decision is made on a per-render target
basis. In our tilebuffer layout calculation, rather than asserting that all
render targets fit, introduce a notion of spilling.

This doesn't actually implement spilling -- it just pushes the assert failure
down to the users. But it's progress.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24258>
2023-07-20 15:33:28 +00:00
Alyssa Rosenzweig
be5004691c asahi: Advertise GL 3.1
We now have support for baseline MSAA, except for support for eMRT. But hey,
this gets us 99% of the way there, so it's worth flipping on at least in
agx/next.

We can also advertise dual-source blending again. It was reverted since Chromium
freaks out with dual-source blending on a GL 2.1 driver, but since we're
advertising GL 3.1 now, it's ok.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23480>
2023-06-07 03:21:49 +00:00
Asahi Lina
75e3212809 Revert "asahi: Advertise dual-source blending"
This reverts commit f4e2b22646.

This is broken until GL3 is enabled, possibly due to a core Mesa bug,
but it's a corner case not worth fixing.

Fixes Chromium.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22353>
2023-04-07 03:23:04 +00:00
Eric Engestrom
8e6ac35658 asahi: fix a few typos
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21947>
2023-03-17 22:11:33 +00:00
Alyssa Rosenzweig
f4e2b22646 asahi: Advertise dual-source blending
This is handled entirely in common code.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21545>
2023-03-05 07:38:36 +00:00
Alyssa Rosenzweig
029c686c6d asahi: Implement color masks with masked stores
Blend states can require masking colour. Currently, this is handled by
nir_lower_blend, which lowers masks to a read-modify-write operation as required
on Mali hardware. However, our "tilebuffer store" instruction supports a write
mask, allowing us to write only a subset of channels to the tilebuffer. It's
more efficient to use that than to emit pointless tilebuffer loads.

Note that even without tilebuffer loads, non-opaque masks don't work with opaque
pass types.  Here, we handle this with a translucent pass type, which gets HSR
to do the right thing and is consistent with the pass type used previously.
However, it's a bit heavy handed -- Apple manages to use an opaque pass type
with masking but with some unknown HSR fields twiddled. IMO reverse-engineering
those details shouldn't block this because this gets us closer to optimal (just
not all the way there) and is strictly better than what we had before.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21431>
2023-02-21 08:10:15 +00:00
Alyssa Rosenzweig
13b25a6114 asahi: Don't use 16-bit inputs to 32-bit st_tile
The hardware doesn't extend in this case, we need to extend for it. This
fixes 32-bit render target formats with lower_mediump_io.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21082>
2023-02-04 08:14:32 +00:00
Alyssa Rosenzweig
6b645f12ad asahi/lower_tilebuffer: Avoid loading sample mask
If a render target isn't written to, we don't use the sample mask. Avoid
generating the intermediate instructions, common with gl_FragColor. It will get
DCE'd, but this means less work for DCE, which should help for shader jank since
this pass gets called per-variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
f603d8ce9e asahi: Clang-format the subtree
See 0afd691f29 ("panfrost: clang-format the tree") for why I'm doing this.
Asahi already mostly follows Mesa style so this doesn't do much. But this means
we can all stop thinking about formatting and trust the robot poets to do that
for us.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20434>
2022-12-27 22:46:29 +00:00
Alyssa Rosenzweig
74de571402 asahi: Add NIR pass to lower tilebuffer access
The compiler can't handle load/store_output directly for nontrivial tilebuffer
layouts. Add a NIR pass to lower these intrinsics, applying a given layout.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19871>
2022-11-19 20:25:41 +00:00