Commit graph

16484 commits

Author SHA1 Message Date
Timur Kristóf
896237b52e ac/nir/ngg: Simplify updating mesh shader output info.
All 64-bit outputs are already lowered to 32-bit.
There is no need to handle them here.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32640>
2024-12-28 10:30:58 -06:00
Timur Kristóf
f460e3a36b ac/nir/ngg: Use ac_nir_prerast_out in mesh shader lowering.
This will help us share more code between the mesh shader lowering
and other passes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32640>
2024-12-28 10:30:53 -06:00
David Rosca
96cb12ac68 radv/amdgpu: Set VCN version for ac_parse_ib
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32760>
2024-12-27 08:17:16 +00:00
David Rosca
e3d602de98 ac/parse_ib: Parse VCN IB_COMMON_OP_WRITEMEMORY
And more small fixes.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32760>
2024-12-27 08:17:16 +00:00
Qiang Yu
b0c47871ec ac: remove ac_nir_lower_subdword_loads
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32781>
2024-12-27 01:58:38 +00:00
Qiang Yu
21f888a3ed ac,radv: move ac_nir_lower_bit_size_callback to common place
To be used by radeonsi for OpenCL.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32781>
2024-12-27 01:58:38 +00:00
Qiang Yu
5f601361ed ac/nir: lower access for shared and scratch memory
OpenCL may load and store vec16 data, while ACO only
support <=32byte. Radeonsi is going to use
ac_nir_lower_mem_access_bit_sizes() for lowering these
access.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32781>
2024-12-27 01:58:38 +00:00
Marek Olšák
c0e5e8f932 amd: update addrlib
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32687>
2024-12-26 21:02:21 +00:00
Georg Lehmann
33a73203b0 aco/isel: skip and(exec) for top level demote_if/terminate_if
In nested control flow this is nessecary to not demote/terminate invocations
that are part of the global but not part of the local mask.

At the top level, the masks are the same and no additional invocations
can be accidentally disabled.

Foz-DB Navi21:
Totals from 2095 (2.64% of 79395) affected shaders:
Instrs: 1058326 -> 1056839 (-0.14%)
CodeSize: 5632480 -> 5626616 (-0.10%)
Latency: 12082761 -> 12080520 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 2246677 -> 2246636 (-0.00%); split: -0.00%, +0.00%
Copies: 114446 -> 114433 (-0.01%)
SALU: 230585 -> 229098 (-0.64%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32755>
2024-12-26 18:34:38 +00:00
Marek Olšák
19c00c586e ac/llvm: remove unused code
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32780>
2024-12-26 10:12:43 +00:00
Marek Olšák
c6fd69bd5e ac: remove unused code
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32780>
2024-12-26 10:12:43 +00:00
Evan
4e89690878 amd/vpelib: Shaper Refactor
- Refactor Shaper code to apply linear OR PQ based on input transfer function
- Program gamma based on shaper expected input CS
- fix fp16 input handling
- fix snake case in update_whitepoint

Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Signed-off-by: Evan Damphousse <evan.damphousse@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32695>
2024-12-26 01:23:59 +00:00
Hsieh, Mike
596d9ff8cf amd/vpelib: Refactor 3D LUT parameters
Reviewed-by: Jesse Agate <Jesse.Agate@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32695>
2024-12-26 01:23:59 +00:00
Chen, Phoebe
7d326ab082 amd/vpelib: Refactor YUV format check
Using general vpe_is_yuv* helper function for the condition check

Reviewed-by: Evan Damphousse <evan.damphousse@amd.com>
Reviewed-by: Roy Chan <Roy.Chan@amd.com>
Reviewed-by: Navid Assadian <Navid.Assadian@amd.com>
Acked-by: Chih-Wei Chien <Chih-Wei.Chien@amd.com>
Signed-off-by: Phoebe Chen <phoebe.chen@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32695>
2024-12-26 01:23:59 +00:00
Marek Olšák
af899c3752 radeonsi,radv: fix incorrect min_esverts for NGG subgroup calculation
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32713>
2024-12-24 12:02:20 +00:00
Marek Olšák
08abddd235 radeonsi/gfx11: fix alpha-to-coverage + alpha-to-one used together
alpha-to-coverage must be applied before alpha-to-one. The only way to do
that is to export alpha for alpha-to-coverage via mrtz, and export 1 via
mrt0.a.

ACO and monolithic shader support is already in place thanks to RADV,
so we only need to change the LLVM PS epilog and the shader key.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32713>
2024-12-24 12:02:20 +00:00
Marek Olšák
de996ac481 radeonsi: kill Z and stencil PS outputs if depth or stencil is disabled
This adds kill_z and kill_stencil flags to the shader PS epilog key, which
removes those outputs if depth or stencil are disabled.

It must be implemented in:
* ACO PS epilog
* LLVM PS epilog
* ac_nir_lower_ps for monolithic shaders

Some of the samplemask code wasn't completely correct, but probably harmless.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32713>
2024-12-24 12:02:20 +00:00
Pierre-Eric Pelloux-Prayer
c0ef2aa7f8 DEPENDENCY: ac/llvm: fix sparse code handling
The existing code produced a incorrectly sized result from visit_tex.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32713>
2024-12-24 12:02:19 +00:00
Qiang Yu
dff14d102d aco: fix voffset missing when buffer store base >=4096
Regression on test:
  dEQP-GLES31.functional.geometry_shading.basic.output_256

voffset is missing if buffer store base >=4096, we need to
re-calculate offen after resolve_excess_vmem_const_offset().

Fixes: cdaf269924 ("aco: inline store_vmem_mubuf/emit_single_mubuf_store")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32767>
2024-12-24 01:42:45 +00:00
Samuel Pitoiset
2c323f2b8c radv: rename color output state to fragment output state
Now that it also exports depth.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32675>
2024-12-23 08:09:26 +00:00
Samuel Pitoiset
47dc9ca512 radv: rework emitting SPI_SHADER_Z_FORMAT
This fixes a small issue when the Z format in PS epilogs change, like
when alpha-to-coverage is enabled and then disabled.

igned-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32675>
2024-12-23 08:09:26 +00:00
Daniel Schürmann
28a214728c ac/lower_ngg: move readlane into break blocks in streamout code generation for gfx12/ACO
This avoids unnecessary shuffle code and s_wait_loadcnt.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32743>
2024-12-21 12:32:25 +00:00
Daniel Schürmann
47227089d6 ac/lower_ngg: move break blocks after loop in streamout code generation for gfx12/ACO
By inverting the break condition, the loop becomes shorter.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32743>
2024-12-21 12:32:25 +00:00
Daniel Schürmann
39dcd9dedb ac/lower_ngg: Fix collecting buffer offsets from 4 lanes on gfx12
Also use readlane for improved performance.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32743>
2024-12-21 12:32:25 +00:00
Samuel Pitoiset
a7d0f0b30e radv: check descriptor indexing features for enabling the global BO list
It's more accurate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32718>
2024-12-20 07:43:59 +00:00
Samuel Pitoiset
62edab4cac radv: cleanup enabling the global BO list when BDA is used
VK_{EXT,KHR}_buffer_device_address are redundant with the
bufferDeviceAddress feature.

VK_KHR_ray_tracing_pipeline depends on VK_KHR_acceleration_structure
which also depends on the bufferDeviceAddress feature.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32718>
2024-12-20 07:43:59 +00:00
Erik Faye-Lund
3b94bd03c2 radv: use vk_descriptor_type_is_dynamic
No need to open-code this one now that we have a generic helper.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32627>
2024-12-19 15:12:58 +00:00
Samuel Pitoiset
0b3e7ec36f radv/nir: simplify lowering of query intrinsics
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32702>
2024-12-19 08:08:53 +00:00
Samuel Pitoiset
a7d32be1dd radv: rename GDS queries to emulated queries
Emulated is more generic than GDS. GDS will be replaced with SSBO
atomics anyways.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32702>
2024-12-19 08:08:53 +00:00
Samuel Pitoiset
db5d57e95e radv: fix getting the number of vertices per prim for the last VGT stage
This is only valid for VS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32701>
2024-12-19 07:46:28 +00:00
Samuel Pitoiset
3939214906 radv/nir: fix checking if task shader invocations query is enabled
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32701>
2024-12-19 07:46:28 +00:00
Samuel Pitoiset
91cdee8a38 radv: only enable emulated mesh/task shader queries on GFX10.3
It's not emulated on GFX11+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32701>
2024-12-19 07:46:28 +00:00
Marek Olšák
4d8a508510 ac/nir: call nir_gather_tcs_info only once for RADV
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
8c2f9f0665 radv: switch to the new TCS LDS/offchip size computation
to use the same logic as radeonsi. This could be improved, see TODOs.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
3056bf1cb1 ac/nir: add new helpers for computing the TCS LDS/offchip size accurately
This is based on how the HS lowering passes address TCS inputs and
outputs. The new LDS size is lower in some cases.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
85c20def94 ac,radv,radeonsi: enable TCS input reads from VGPRs for all compatible loads
Cross-invocation TCS input access doesn't prevent same-invocation access.
This improves shaders that use both for the same inputs.

Also, if some components of a vec4 slot only use same-invocation access and
other components only use cross-invocation access (it's possible after
compaction), this takes the VGPR path for the components with
same-invocation access, which didn't happen previously because all masks
only describe whole vec4s.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
99a03dc9d5 ac/nir: allow a TCS input to be available from both VGPRs and LDS
Both can be used. Cross-invocation access can read it from LDS, while
same-invocation access can read it from VGPRs.

The entrypoints of the passes don't allow that flexibility yet,
but the logic inside the pass allows it.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
b49eab68a8 ac/nir: use s_sendmsg(HS_TESSFACTOR) to optimize writing tess factors for gfx11
This uses the new shader message. It eliminates memory stores and latency
for simple cases of tess level values.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Marek Olšák
f4eebb373c ac/nir: reserve the first LDS vec4 for the HS tf0/1 group vote in TCS
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31673>
2024-12-18 11:07:59 +00:00
Valentine Burley
61d9c47944 ci/lava: Use CI_JOB_TIMEOUT instead of separate variable
The CI_JOB_TIMEOUT variable is the GitLab-defined job timeout in
seconds.
Use this variable in LAVA instead of the separate JOB_TIMEOUT,
which was intended to represent the test phase timeout (job timeout
minus 5 minutes), but was often overlooked.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32609>
2024-12-18 09:23:27 +00:00
Samuel Pitoiset
2e1c87c1ca radv: add few more query helpers for copying results
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32678>
2024-12-18 07:51:57 +00:00
Samuel Pitoiset
5b53f6deaa radv: remove dead code in radv_CmdCopyQueryPoolResults()
Incrementing dest_va doesn't do anything.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32678>
2024-12-18 07:51:57 +00:00
Samuel Pitoiset
ebe9dc49b7 radv: reorganize query code by adding separate begin/end helpers
The query code is getting big and complex over time. It will be even
more complicated because GDS doesn't exist on GFX12. Let's reorganize
slightly to make it more readable and easier to maintain.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32678>
2024-12-18 07:51:57 +00:00
Samuel Pitoiset
6e59778e5d radv: fix capturing RT pipelines that return VK_OPERATION_DEFERRED_KHR for RGP
This isn't an error.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32683>
2024-12-17 17:12:27 +00:00
Samuel Pitoiset
0223f0f54d radv: fix missing variants for the last VGT stage with shader object
Last VGT stages (VS, TES or GS) can always be used with a null FS when
nextStage is non-zero. Like if a VS is created with nextStage=TCS, it's
also allowed to draw without binding a CTS (ie. nextStage=None is always
a valid case).

Because we don't want to compile two variants for NONE and FRAGMENT,
let's compile only the FRAGMENT one when necessary.

Fixes new CTS coverage, see https://gerrit.khronos.org/c/vk-gl-cts/+/15976.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32665>
2024-12-17 09:50:52 +00:00
Samuel Pitoiset
5ad025b675 radv/ci: fix expected list of failures for TAHITI
DGC tests are skipped.

Fixes: dda03a21d6 ("Revert "radv: fix creating unlinked shaders with ESO when nextStage is 0"")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32672>
2024-12-17 09:49:14 +01:00
Valentine Burley
0615b92c23 radv/ci: Use deqp-vk-main in Raven and Stoney RADV jobs
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32647>
2024-12-17 07:23:03 +00:00
Marek Olšák
cdecbee922 radeonsi/gfx12: adjust HiZ/HiS logic
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:28 +00:00
Marek Olšák
e3cef02c24 radeonsi/gfx12: set DB_RENDER_OVERRIDE based on stencil state
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:28 +00:00
Marek Olšák
8328e57512 ac/surface/gfx12: enable DCC 256B compressed blocks and reorder modifiers
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32653>
2024-12-16 21:54:27 +00:00