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ac/nir/ngg: Simplify updating mesh shader output info.
All 64-bit outputs are already lowered to 32-bit. There is no need to handle them here. Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32640>
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commit
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1 changed files with 14 additions and 25 deletions
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@ -3950,21 +3950,6 @@ ms_arrayed_output_base_addr(nir_builder *b,
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return nir_iadd_nuw(b, arr_index_off, io_off);
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}
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static void
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update_ms_output_info_slot(lower_ngg_ms_state *s,
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unsigned slot, unsigned base_off,
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uint32_t components_mask)
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{
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while (components_mask) {
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ac_nir_prerast_per_output_info *info = &s->out.infos[slot + base_off];
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const uint8_t mask = components_mask & 0xF;
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info->components_mask |= mask;
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components_mask >>= 4;
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base_off++;
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}
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}
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static void
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update_ms_output_info(const nir_io_semantics io_sem,
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const nir_src *base_offset_src,
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@ -3974,17 +3959,21 @@ update_ms_output_info(const nir_io_semantics io_sem,
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const ms_out_part *out,
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lower_ngg_ms_state *s)
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{
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uint32_t write_mask_32 = util_widen_mask(write_mask, DIV_ROUND_UP(bit_size, 32));
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uint32_t components_mask = write_mask_32 << component_offset;
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const uint32_t components_mask = write_mask << component_offset;
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if (nir_src_is_const(*base_offset_src)) {
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/* Simply mark the components of the current slot as used. */
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unsigned base_off = nir_src_as_uint(*base_offset_src);
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update_ms_output_info_slot(s, io_sem.location, base_off, components_mask);
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} else {
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/* Indirect offset: mark the components of all slots as used. */
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for (unsigned base_off = 0; base_off < io_sem.num_slots; ++base_off)
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update_ms_output_info_slot(s, io_sem.location, base_off, components_mask);
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/* 64-bit outputs should have already been lowered to 32-bit. */
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assert(bit_size <= 32);
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assert(components_mask <= 0xf);
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/* When the base offset is constant, only mark the components of the current slot as used.
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* Otherwise, mark the components of all possibly affected slots as used.
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*/
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const unsigned base_off_start = nir_src_is_const(*base_offset_src) ? nir_src_as_uint(*base_offset_src) : 0;
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const unsigned num_slots = nir_src_is_const(*base_offset_src) ? 1 : io_sem.num_slots;
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for (unsigned base_off = base_off_start; base_off < num_slots; ++base_off) {
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ac_nir_prerast_per_output_info *info = &s->out.infos[io_sem.location + base_off];
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info->components_mask |= components_mask;
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}
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}
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