Commit graph

7650 commits

Author SHA1 Message Date
Timur Kristóf
8918a809ce ac: Remove deprecated use_late_alloc field as nobody uses it anymore.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11905>
2021-08-04 15:37:05 +00:00
Timur Kristóf
d911259c3a radv: Use ac_compute_late_alloc in radv_pipeline.
This aligns RADV with RadeonSI in how it handles late alloc,
making it easier for us to deal with deadlocks and such.

Also move setting the RSRC3 registers for VS, GS and NGG
into radv_pipeline.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11905>
2021-08-04 15:37:05 +00:00
Timur Kristóf
61eb3debcf radv: Don't toggle PC oversubscription for NGG culling.
We are going to add this directly to the pipeline.
If a pipeline has such a shader, NGG culling is turned on
most of the time, so it's not useful to toggle this setting.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11905>
2021-08-04 15:37:05 +00:00
Timur Kristóf
448592b9ae aco: Use Navi 10 empty NGG output workaround on NGG culling shaders.
Navi 10 can hang when an NGG workgroup has no output,
so we work around that by always exporting a single zero-area
triangle with a single vertex that has all-NaN coordinates.

Thus far, we only employed this for NGG GS, because on all
other stages, the output can't be empty.

However, with NGG culling, the output can be empty, so let's
apply the same workaround there too.

Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12169>
2021-08-04 12:28:34 +00:00
Rhys Perry
566970f273 aco: use image_dim and image_array intrinsic indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12190>
2021-08-04 12:09:07 +00:00
Rhys Perry
39db5a569b radv: set image_dim and image_array intrinsic indices
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12190>
2021-08-04 12:09:07 +00:00
Samuel Pitoiset
ad83c06a5f radv: fix missing cache flushes when clearing HTILE levels on GFX10+
The driver should accumulate the cache flush bits because if it uses
CP DMA for clearing the last level, it won't flush.

Found by inspection.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12170>
2021-08-03 12:59:57 +00:00
Samuel Pitoiset
ebea075feb radv: fix selecting the first active CU when profiling with SQTT
Fixes: d26bcc0f5c ("radv: always select the first active CU when profiling with SQTT")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12167>
2021-08-03 12:30:41 +00:00
Timothy Arceri
a9ed4538ab nir: add indirect loop unrolling to compiler options
This is where it should be rather than having to pass it into the
optimisation pass every time.

It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
2021-08-03 10:54:50 +00:00
Samuel Pitoiset
a49b397041 ac/surface: implement CmaskAddrFromCoord in NIR
It's similar to DCC, only GFX9 is currently supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
eedc0b59b7 ac/surface: copy the CMASK equation to radeon_surf
Only GFX9 is currently supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
1f12c3ccc1 ac/surface: store CMASK pitch and height to radeon_surf
Only GFX9+ is currently supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
132b205566 ac/surface: add tests for CmaskAddrFromCoord prototype outside of addrlib
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
96e12644f3 amd/addrlib: expose CMASK address equations to drivers on GFX9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Samuel Pitoiset
501db87779 ac: introduce a structure to store DCC address equations for GFX9
CMASK addr equations will use the same struct.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12140>
2021-08-03 07:02:48 +00:00
Rob Clark
6edf0d8e90 driconfig: Add support for device specific config
Add support for driconf overrides on a per-device level, for cases
where we don't want to override behavior for all devices supported
by a particular driver.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12135>
2021-08-02 16:37:24 -07:00
Timur Kristóf
a6110f3c3a ac/nir: Remove unhelpful nir_opt_cse from ac_nir_lower_ngg_nogs.
This CSE call adds to our compile time without adding any real
benefit to the compiled code.

Fossil DB results on Sienna Cichlid (with NGGC on):

Totals from 1580 (1.23% of 128647) affected shaders:
CodeSize: 4563912 -> 4562312 (-0.04%); split: -0.07%, +0.03%
Instrs: 870722 -> 870338 (-0.04%); split: -0.09%, +0.04%
Latency: 3349863 -> 3351458 (+0.05%); split: -0.10%, +0.14%
InvThroughput: 617796 -> 617971 (+0.03%); split: -0.01%, +0.03%
VClause: 22604 -> 22568 (-0.16%); split: -0.75%, +0.59%
SClause: 16285 -> 16327 (+0.26%); split: -0.07%, +0.33%
Copies: 83472 -> 83599 (+0.15%); split: -0.07%, +0.22%
PreSGPRs: 62340 -> 62334 (-0.01%)

No Fossil DB changes with NGGC off.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
2021-08-02 11:38:25 +00:00
Timur Kristóf
da9f4b2e67 nir, aco: Remove vertex and primitive count overwrite intrinsic.
It's no longer needed.

No Fossil DB changes.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
2021-08-02 11:38:25 +00:00
Timur Kristóf
4b540aef2c ac/nir: Don't count vertices and primitives in wave after culling.
These are not needed anymore, because the EXEC mask doesn't depend on them.

Fossil DB results on Sienna Cichlid (with NGGC on):

Totals from 58239 (45.27% of 128647) affected shaders:
Latency: 138113669 -> 138285372 (+0.12%)
InvThroughput: 22404840 -> 22405245 (+0.00%)

No Fossil DB changes with NGGC off.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
2021-08-02 11:38:25 +00:00
Timur Kristóf
a2d02c0c11 ac/nir: Use gs_accepted variable after culling.
This prevents us from recalculating the EXEC mask later
in the shader, and removes the requirement for
counting the number of primitives.

The stats are better than expected because they also
show that some code that is still there is now DCE'd by ACO.

Fossil DB results on Sienna Cichlid (with NGGC on):

Totals from 58239 (45.27% of 128647) affected shaders:
SpillSGPRs: 330 -> 340 (+3.03%)
CodeSize: 166356072 -> 162805724 (-2.13%)
Instrs: 31920041 -> 31089256 (-2.60%)
Latency: 138815742 -> 138113669 (-0.51%); split: -0.54%, +0.03%
InvThroughput: 22459553 -> 22404840 (-0.24%); split: -0.26%, +0.02%
SClause: 753746 -> 753765 (+0.00%); split: -0.00%, +0.01%
Copies: 3226647 -> 3268973 (+1.31%); split: -0.45%, +1.76%
Branches: 1223441 -> 1223440 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 2025339 -> 2091013 (+3.24%)

No Fossil DB changes with NGGC off.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
2021-08-02 11:38:25 +00:00
Timur Kristóf
8159868699 ac/nir: Use es_accepted variable after culling.
This avoids re-calculating the exec mask for ES vertices,
and makes it unnecessary to count the number of vertices left.

Fossil DB results on Sienna Cichlid (with NGGC on):

Totals from 58239 (45.27% of 128647) affected shaders:
CodeSize: 166521108 -> 166356072 (-0.10%); split: -0.10%, +0.00%
Instrs: 31961308 -> 31920041 (-0.13%); split: -0.13%, +0.00%
Latency: 138820463 -> 138815742 (-0.00%); split: -0.04%, +0.04%
InvThroughput: 22460177 -> 22459553 (-0.00%); split: -0.00%, +0.00%
SClause: 753744 -> 753746 (+0.00%)
Copies: 3093140 -> 3226647 (+4.32%); split: -0.03%, +4.34%

No Fossil DB changes with NGGC off.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
2021-08-02 11:38:25 +00:00
Timur Kristóf
1bbea90f50 aco, nir, ac: Simplify sequence of getting initial NGG VS edge flags.
Instead of v_bfe + v_lshl_or for each vertex, get all 3 edge flags
at once of every vertex. This takes fewer VALU instructions than
previously.

Fossil DB results on Sienna Cichlid (with NGGC on):

Totals from 56917 (44.24% of 128647) affected shaders:
CodeSize: 161028288 -> 158751628 (-1.41%)
Instrs: 30917985 -> 30519571 (-1.29%)
Latency: 130617204 -> 129975532 (-0.49%); split: -0.50%, +0.01%
InvThroughput: 21280238 -> 20927401 (-1.66%)
Copies: 3011120 -> 3011125 (+0.00%); split: -0.00%, +0.00%

No Fossil DB changed with NGGC off.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11908>
2021-08-02 11:38:25 +00:00
Rhys Perry
0460f01fdc ac/llvm: implement v2f16 fsat
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12143>
2021-08-02 10:02:51 +00:00
Juan A. Suarez Romero
dfccbdff98 ci: update to VK-GL-CTS 1.2.7.0
v2:
  - Read mustpass files from vk-default.txt (Matt)
  - Remove freedreno atomic geom tests from fail list (Emma)
  - Move freedreno flake to separated line (Emma)

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12069>
2021-07-30 20:02:13 +00:00
Samuel Pitoiset
57ff4caf7f radv: init radv_image::l2_coherent when creating the layout
Otherwise, it might not be correctly initialized for Android.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12103>
2021-07-30 17:06:26 +00:00
Samuel Pitoiset
87b0962fef radv: do not use radeon_set_context_reg_seq() for only one register
radeon_set_context_reg() is a shortcut for that.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
2021-07-30 17:05:38 +02:00
Samuel Pitoiset
f693b94d2f radv: reduce number of emitted DWORDS for contiguous context registers
radeon_set_context_reg() emits 3 DWORDS, while
radeon_set_context_reg_seq() + 2 values only needs 4 DWORDS.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12099>
2021-07-30 17:05:35 +02:00
Pierre-Eric Pelloux-Prayer
3914bd457b amd/registers: fix fields conflict detection
The existing code handled the case where the new definition of the
same field was larger than the old one.
This commit adds a check to handle the reverse case: the new def
is smaller than the old one (= so writing using the merged macro
would affect the next fields).

The affected fields are:
* LGKM_CNT (in SQ_WAVE_IB_STS)
* DONUT_SPLIT (in VGT_TESS_DISTRIBUTION)
* HEAD_QUEUE (in GDS_GWS_RESOURCE)

DONUT_SPLIT is the only one used by radeonsi/radv.

Fixes: e6184b0892 ("amd/registers: scripts for processing register descriptions in JSON")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12063>
2021-07-30 08:50:38 +00:00
Alejandro Piñeiro
476dc3c050 vulkan: add vk_spec_info_to_nir_spirv util method
All vulkan drivers have been copying anv's code to convert
VkSpecializationInfo into nir_spirv_specialization.

Recently there was a Vulkan spec change on allowed values for
VkSpecializationInfo, and all drivers got affected.

This commits creates a new helper, and uses it on all Vulkan Mesa
drivers.

v2: use (uint8_t*) castings, instead of void*, to avoid C2036 with
    MSVC (detected by the CI, inspired on what radv was doing)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12047>
2021-07-29 03:28:52 +00:00
Samuel Pitoiset
72f55cf7c4 radv: implement VK_EXT_shader_atomic_float2
Some floating atomic instructions are not available on GFX8-9.
No LLVM support.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12060>
2021-07-27 08:44:36 +02:00
Samuel Pitoiset
6694c37ea0 aco: implement VK_EXT_shader_atomic_float2
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12060>
2021-07-27 08:44:31 +02:00
Samuel Pitoiset
0497588eac radv: allow unused VkSpecializationMapEntries
Fixes future CTS: dEQP-VK.pipeline.spec_constant.*.basic.*unused_*

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12062>
2021-07-26 14:09:09 +02:00
Georg Lehmann
890b1c0f2a aco: Use cpp_msvc_compat_args.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11610>
2021-07-23 20:28:58 +00:00
Georg Lehmann
c6bcafcc07 radv: Use c_msvc_compat_args.
Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11610>
2021-07-23 20:28:58 +00:00
Jason Ekstrand
a7b429e8ec amd: Don't handle nir_tex_src_ms_mcs
It's an intel-specific texture source and will never be seen on AMD.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11775>
2021-07-23 15:53:57 +00:00
Jason Ekstrand
e83fe65cd8 radv,radeonsi: Do cube size divide-by-6 lowering in NIR
No point in carrying all this code around twice each in two back-ends.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12005>
2021-07-22 14:22:35 -05:00
Rhys Perry
211d1dfd34 aco: don't create v_madmk_f32/v_madak_f32 from v_fma_legacy_f16
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5105
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12004>
2021-07-22 15:43:31 +00:00
Daniel Stone
d8bfad70dc Revert "CI: Disable LAVA devices"
This reverts commit 1f4ff4ed2e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12016>
2021-07-22 08:42:40 +01:00
Daniel Stone
7b8bb81e82 CI: Disable LAVA devices
We've had a physical machine death, and the restore/transfer is achingly
slow at the moment. Some of the devices are still fine, but
conservatively just kill the lot until it's all recovered.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11997>
2021-07-21 17:26:43 +01:00
Daniel Schürmann
1d8e9430d2 aco: include <cstddef> in aco_util.h
It's needed for ptrdiff.

Fixes: 59fdaa1985 ('aco: reorder and cleanup #includes')
Closes: #5076
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11947>
2021-07-21 13:37:00 +00:00
Daniel Schürmann
3870c52159 aco/ra: don't allocate vector space for MIMG NSA operands
In this case, the MIMG vaddr components are not vector-aligned anymore, anyway.

Totals from 11866 (7.90% of 150170) affected shaders: (GFX10.3)
VGPRs: 733064 -> 728408 (-0.64%); split: -0.66%, +0.02%
CodeSize: 67968356 -> 67968440 (+0.00%); split: -0.02%, +0.02%
MaxWaves: 214022 -> 214014 (-0.00%)
Instrs: 12798200 -> 12797232 (-0.01%); split: -0.02%, +0.01%
Latency: 196427665 -> 196418706 (-0.00%); split: -0.02%, +0.01%
InvThroughput: 37082037 -> 37080799 (-0.00%); split: -0.02%, +0.02%
VClause: 246097 -> 246031 (-0.03%); split: -0.16%, +0.13%
Copies: 494852 -> 493923 (-0.19%); split: -0.52%, +0.34%
Branches: 220323 -> 220294 (-0.01%); split: -0.03%, +0.02%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11980>
2021-07-21 09:38:15 +00:00
Daniel Schürmann
9b1a296172 aco/optimizer: ensure to not erase high bits when propagating packed constants
Packed constants with non-zero values in the high half
might have been propagated as 16 bit, dropping the high half.

Cc: mesa-stable
Closes: #5070
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11954>
2021-07-20 07:48:39 +00:00
Timur Kristóf
55d57b828f aco: Fix how p_elect interacts with optimizations.
Since p_elect doesn't have any operands, ACO's value numbering and/or
the pre-RA optimizer could currently recognize two p_elect instructions
in two different blocks as the same.

This patch adds exec as an operand to p_elect in order to achieve
correct behavior.

Fixes: e66f54e5c8
Closes: #5080
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11943>
2021-07-18 00:48:06 +02:00
Timur Kristóf
6e17931d21 radv: Use pre-computed viewport transform for NGG culling state.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
c9a478f1cd radv: remove unused variable from radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
a2ef92d7a5 radv: pre-calculate viewport transforms
this requires more storage in the viewport struct, but it avoids
the need to repeatedly calculate the same transform if e.g., a meta
operation occurs, which can save about 5% cpu in some cases

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Mike Blumenkrantz
1e13cb1965 radv: merge si_write_viewport into radv_emit_viewport
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11839>
2021-07-16 15:22:46 +00:00
Timur Kristóf
60c5abf685 aco: Remove s_and with exec when all lanes are active.
This helps NGG GS and culling shaders.
No Fossil DB changes without NGG culling.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Timur Kristóf
e66f54e5c8 aco: Allow elect to take advantage of knowing when all lanes are active.
Implement elect using a pseudo-op which is lowered during the
insert_exec_mask pass. This makes it possible to emit a more
optimal sequence when the exec mask is constant.

Fossil DB results on Sienna Cichlid:
Totals from 211 (0.16% of 128647) affected shaders:
CodeSize: 2254356 -> 2240468 (-0.62%); split: -0.62%, +0.00%
Instrs: 438471 -> 434996 (-0.79%); split: -0.80%, +0.01%
Latency: 2717082 -> 2709400 (-0.28%); split: -0.28%, +0.00%
InvThroughput: 566987 -> 566342 (-0.11%); split: -0.11%, +0.00%
Copies: 40058 -> 40162 (+0.26%)
Branches: 31209 -> 31211 (+0.01%)
PreSGPRs: 9927 -> 10125 (+1.99%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00
Timur Kristóf
b12318f26c aco: Swap s_and operand order for ballot.
This allows our optimizer to recognize this and eliminate it when
it can prove that the s_and with exec is unneeded.

Fossil DB changes on Sienna Cichlid:
Totals from 1969 (1.53% of 128647) affected shaders:
CodeSize: 9468228 -> 9469348 (+0.01%); split: -0.00%, +0.01%
Instrs: 1773566 -> 1773581 (+0.00%); split: -0.01%, +0.01%
Latency: 19504042 -> 19503385 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 3617406 -> 3617333 (-0.00%)
Copies: 108998 -> 110592 (+1.46%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11458>
2021-07-16 14:31:54 +00:00