Commit graph

207115 commits

Author SHA1 Message Date
Emma Anholt
88f1656133 intel/elk: Save the UW pixel x/y as a temp.
This will be used for representing gl_FragCoord in NIR and reducing
payload registers pushed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:38 +00:00
Emma Anholt
5222c35924 intel/elk: Save the UW pixel x/y as a temp on gfx6+.
This will be used for representing gl_FragCoord in NIR and reducing
payload registers pushed.

HSW results:

total instructions in shared programs: 9940636 -> 9948574 (0.08%)
instructions in affected programs: 852560 -> 860498 (0.93%)

total cycles in shared programs: 314804525 -> 314900080 (0.03%)
cycles in affected programs: 39786599 -> 39882154 (0.24%)

LOST:   5
GAINED: 11
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:38 +00:00
Emma Anholt
af74abd68c intel/fs: Don't bother checking if load_frag_coord uses interpolation.
This was leftover dead code from 4bb6e6817e ("intel: Use a system value
for gl_FragCoord") -- the sysval doesn't do any interpolation and doesn't
have sources that could use a barycentric.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:37 +00:00
Emma Anholt
1b9b63de37 intel/shim: Report I915_PARAM_HAS_GEN7_SOL_RESET.
Quiets more startup warnings from drm-shim.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:37 +00:00
Emma Anholt
1b6689d79e intel/shim: Report support for PXP status.
Otherwise drm-shim complains on every shader-db run.

Fixes: e358173fbf ("iris: Add GET_PARAM for protected context capability support")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:37 +00:00
Emma Anholt
908bfb2ac9 nir: Add support for load_frag_coord_zw to nir_opt_fragdepth.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:36 +00:00
Emma Anholt
3b28604be2 nir: Make pixel_coord/frag_coord_zw be peephole-able sysvals.
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:36 +00:00
Emma Anholt
8fa6d473e7 nir: Add SYSTEM_VALUE_FRAG_COORD_Z/W.
Intel's going to use these.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:36 +00:00
Emma Anholt
7db62e6dad nir: Split nir_load_frag_coord_zw to separate z/w intrinsics.
This will be a win for Intel for tracking which payload values need to be
set up.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25190>
2025-06-18 23:11:36 +00:00
Emma Anholt
0bf114736a intel: Use the common NIR lowering for fquantize2f16.
This generates one extra instruction to set the rounding mode to RTE due
to f2f16_rtne in the lowering.  This changes the result for
fquantize2f16(65505.0) from 65536 to 65504, which fixes SPIR-V
conformance for this value:

    If Value is positive with a magnitude too large to represent as a
    16-bit floating-point value, the result is positive infinity. If Value
    is negative with a magnitude too large to represent as a 16-bit
    floating-point value, the result is negative infinity.

SPIR-V doesn't specify whether this overflow check is before or after
rounding, but IEEE specifies rounding first, which is what produces our
65504.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25552>
2025-06-18 22:45:08 +00:00
Yiwei Zhang
4efaa64159 vulkan/treewide: add and use common Android HMI hal implementation
There's no need for a per driver HMI implementation since the
vk_icdGetInstanceProcAddr implementation can well populate the required
entrypoints for Android icd.

Changes have to be done in this single commit for simplicity. Otherwise,
I would have to create a separate android shared library in the runtime
like how vk_instance is handled today, so that the target is able to
check per driver enablement def. However, after all drivers have
migrated over within this MR, we still have to clean those up. So I
decided to just do those in a single commit instead.

v2: avoid preloading u_gralloc in vulkan hal open

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:53 +00:00
Yiwei Zhang
04d0392007 vulkan/android: clean up helpers no longer used
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:53 +00:00
Yiwei Zhang
08f18030bd venus: adopt common android u_gralloc helpers
Drop explicit u_gralloc init since it will be initialized upon the
initial vk_android_get_ugralloc.

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:53 +00:00
Yiwei Zhang
217685108a gfxstream: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:52 +00:00
Yiwei Zhang
edbefeb5b1 v3dv: drop explicit u_gralloc init
u_gralloc will be initialized upon the initial vk_android_get_ugralloc.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:52 +00:00
Yiwei Zhang
6d27c16f13 v3dv: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:52 +00:00
Yiwei Zhang
818464f443 turnip: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:52 +00:00
Yiwei Zhang
ba48380260 radv: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:51 +00:00
Yiwei Zhang
ca419ff624 panvk: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:51 +00:00
Yiwei Zhang
73aa0f5370 nvk: drop explicit u_gralloc init
u_gralloc will be initialized upon the initial vk_android_get_ugralloc.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:50 +00:00
Yiwei Zhang
0bff86d31e nvk: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:50 +00:00
Yiwei Zhang
0e77de00e3 lvp: drop explicit u_gralloc init
u_gralloc will be initialized upon the initial vk_android_get_ugralloc.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:50 +00:00
Yiwei Zhang
a2ca6843c7 lvp: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:50 +00:00
Yiwei Zhang
02c65181c1 hasvk: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:49 +00:00
Yiwei Zhang
710282f83c anv: adopt common Android gralloc helpers
u_gralloc will be initialized upon the initial vk_android_get_ugralloc.

v2: drop explicit gralloc init

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:49 +00:00
Yiwei Zhang
896bda5143 anv: free up hwvulkan_device_t upon driver unloading
Per <hardware/hwvulkan.h>, the hw_device_t::close() function is called
upon driver unloading. The behavior has been like this since Android 10.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:49 +00:00
Yiwei Zhang
0c141ef492 vulkan/android: update helper to initialize u_gralloc once
Initialize u_gralloc once upon the initial init or get call. We'll skip
updating the backend drivers for this since most usages will be cleaned
up later.

Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:49 +00:00
Yiwei Zhang
6c284cd534 vulkan/android: rename global u_gralloc ptr
...to avoid mixing up with type name and local returns from getter.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35561>
2025-06-18 22:23:48 +00:00
Jesse Natalie
856f1d4e3c d3d12: Fail-fast on PSO creation failures
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
I'm seeing crash reports from the wild where it's not necessarily clear why
something failed, and it'd be nice to have the PSO desc on the stack when
something failed. It ends up being fatal anyway (we don't gracefully drop
draw calls, and I don't think we should).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35614>
2025-06-18 22:07:19 +00:00
Jesse Natalie
43d61df19b microsoft/compiler: Clamp bias to DXIL valid range
Technically this won't produce valid results, but it will at least compile and
will probably be good enough, which is better than where we are right now,
which is that shaders fail to validate.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35614>
2025-06-18 22:07:19 +00:00
Olivia Lee
b8c7fcda27 panfrost: fix depth clip range with u_blitter
u_blitter sets a viewport transform with depth range [-1,1], which is
outside the [0,1] range that is allowed by opengl.

The mali hardware docs state that setting the LOW_DEPTH_CLAMP register
outside of [0,1] is undefined behavior. We haven't observed any problems
with this so far, but better to fix it.

Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Fixes: 810135fb42 ("gallium/u_blitter: Fix depth.")
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35225>
2025-06-18 21:16:23 +00:00
Sagar Ghuge
a676ba9294 anv: Apply flush during WriteAccelerationStructures
We are reading accel header parameter those are updated by CS, so we
need to apply flushes to make L3 coherent with CS.

This fixes ray query tests on MTL:
- dEQP-VK.ray_query.*.serialization.*

Cc: mesa-stable

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35590>
2025-06-18 20:56:56 +00:00
Eric Engestrom
6446433761 docs: add sha sum for 25.1.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35611>
2025-06-18 20:52:32 +00:00
Eric Engestrom
5e772e00d5 docs: add release notes for 25.1.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35611>
2025-06-18 20:52:32 +00:00
Eric Engestrom
952305e853 docs: update calendar for 25.1.4
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35611>
2025-06-18 20:52:32 +00:00
Emma Anholt
0ba0681cfc tu: Add a link to my branch for stencil read optimization.
No sense in someone else retimplementing it if they want to test it, too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34991>
2025-06-18 20:30:31 +00:00
Emma Anholt
7714480c79 tu,freedreno/a6xx: Give the FS_CTRL UNK24 bit a name: INOUTREGOVERLAP.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34991>
2025-06-18 20:30:31 +00:00
Emma Anholt
7fe18b147d tu,freedreno: Rename the MRT enable_blend field to blend_reads_dest.
The per-MRT blend enables are in RB_MRT_CONTROL regs, this field is a
bitmask of whether we need to read in the MRT's current color in order to
perform the blending/colormask/logicop.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34991>
2025-06-18 20:30:31 +00:00
Job Noorman
78f62d6d6d nir: remove unused global_atomic(_swap)_ir3 intrinsics
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
ir3 switched to using the generic ones.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:33 +00:00
Job Noorman
2490ecf5fc ir3: ingest global addresses as 64b values from NIR
There are currently two places where we have to handle values that are
logically 64b: 64b atomics and 64b global addresses. For the former, we
ingest the values as 64b from NIR, while the latter uses 2x32b values.
This commit makes things more consistent by using 64b NIR values for
global addresses as well.

Of course, we could also go the other way around and use 2x32b values
everywhere, which would make things consistent as well. Given that ir3
doesn't actually have 64b registers, and 64b values are represented by
collected 2x32b registers, this could actually make more sense.

In the end, both methods are mostly equivalent and it probably doesn't
matter too much one way or the other. However, the reason I have a
slight preference for ingesting things as 64b is that it allows us to
use more of the generic NIR intrinsics, which use 1-component values for
64b addresses or atomic values. This commit already makes
global_atomic(_swap)_ir3 obsolete and I'm planning to create generic
intrinsics to support ldg.a/stg.a as well.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:32 +00:00
Job Noorman
c91f4b2363 ir3: use ir3_64b helpers where possible
Don't rely on manually (un)packing 64b values from/into components but
use the newly introduced ir3_64b helpers.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:32 +00:00
Job Noorman
7cf01a1ae0 ir3: don't vectorize 64b values
The only 64b ops that are supported are (un)packs and using rptN won't
help them.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:32 +00:00
Job Noorman
669270ca7e ir3: add support for u2u64
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:31 +00:00
Job Noorman
d2f9972945 ir3/lower_preamble: add support for 64b values
Now that we support 64b values in more places, they might end up being
stored in the preamble.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:31 +00:00
Job Noorman
917c56c78c ir3: add ir3_split_off_scalar helper
This implements the common pattern of splitting-off a scalar value from
a vector. It handles both 64b (via ir3_64b) and normal register scalars.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:31 +00:00
Job Noorman
37f4786881 ir3: add helpers to handle 64b values
64b values occupy 2 registers but we receive them as a single component
value from NIR. Since there are many places that assume a 1:1
relationship between components and instructions, this can be error
prone as we have to remember to double the number of components whenever
a 64b value is involved.

This commit tries to improve on this situation by representing 64b
values as a collect of 2 registers, restoring the 1:1 mapping between
NIR components and ir3 instructions. This commit only adds some helpers
to create 64b values and access their individual components but doesn't
actually use them yet. This will happen in a follow-up commit.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:31 +00:00
Job Noorman
2f75e6cba9 ir3: flatten nested collects
When creating a collect with a source that is itself a collect, flatten
the latter's sources into the new collect. This is mainly useful for
collects used for 64b values, as we can treat them just like non-64b
values when collecting them.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:30 +00:00
Job Noorman
74aecf2207 ir3: add support for collects in ir3_get_src_shared
We want to start lowering certain NIR instructions to collects (e.g.,
instructions with a 64b def) which means that ir3_get_src_shared has to
support collects. Since we can't mov the result of a collect, implement
this by converting its sources and creating a new collect.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:30 +00:00
Job Noorman
36300ee51d ir3: move collect/split helpers to ir3.{c,h}
They have nothing to do with ir3_context and this way, we can use them
from ir3.h.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33797>
2025-06-18 19:06:30 +00:00
José Roberto de Souza
37f4182ac3 Revert "anv: Enable preemption due 3DPRIMITIVE in GFX 12"
Enabling preemption in 3DPRIMITIVE is causing glitches on Dota 2,
so reverting this until the issue with preemption is fixed.

This reverts commit 3cd972a2d3.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13289
Fixes: 12ddaa6b8b ("anv: Enable preemption due 3DPRIMITIVE in GFX 12")
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35586>
2025-06-18 18:52:19 +00:00