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Author SHA1 Message Date
Rhys Perry
88e03feb27 aco: schedule LDS instructions 
fossil-db (navi31):
Totals from 1823 (2.30% of 79395) affected shaders:
MaxWaves: 53845 -> 53827 (-0.03%); split: +0.02%, -0.05%
Instrs: 1736317 -> 1731200 (-0.29%); split: -0.38%, +0.09%
CodeSize: 8876760 -> 8857908 (-0.21%); split: -0.29%, +0.08%
VGPRs: 91688 -> 92276 (+0.64%); split: -0.03%, +0.67%
Latency: 11743095 -> 11698872 (-0.38%); split: -0.42%, +0.04%
InvThroughput: 2070526 -> 2067440 (-0.15%); split: -0.17%, +0.02%
VClause: 39048 -> 39058 (+0.03%); split: -0.01%, +0.03%
SClause: 35371 -> 35406 (+0.10%); split: -0.02%, +0.12%
Copies: 104335 -> 104384 (+0.05%); split: -0.21%, +0.26%
Branches: 29769 -> 29794 (+0.08%); split: -0.00%, +0.09%
VALU: 970925 -> 970974 (+0.01%); split: -0.01%, +0.02%
SALU: 146222 -> 146345 (+0.08%); split: -0.01%, +0.09%
VOPD: 1119 -> 1162 (+3.84%); split: +4.29%, -0.45%

fossil-db (navi21):
Totals from 37078 (46.70% of 79395) affected shaders:
MaxWaves: 990093 -> 990025 (-0.01%)
Instrs: 21130662 -> 21182543 (+0.25%); split: -0.01%, +0.26%
CodeSize: 110205364 -> 110415032 (+0.19%); split: -0.01%, +0.20%
VGPRs: 1407168 -> 1410768 (+0.26%)
Latency: 90024839 -> 89929196 (-0.11%); split: -0.11%, +0.01%
InvThroughput: 17170356 -> 17167412 (-0.02%); split: -0.02%, +0.00%
VClause: 392830 -> 392825 (-0.00%); split: -0.01%, +0.01%
SClause: 463150 -> 463188 (+0.01%); split: -0.00%, +0.01%
Copies: 1768433 -> 1768483 (+0.00%); split: -0.02%, +0.02%
Branches: 605989 -> 606011 (+0.00%); split: -0.00%, +0.00%
VALU: 11614810 -> 11614912 (+0.00%); split: -0.00%, +0.00%
SALU: 3794531 -> 3794655 (+0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
 2024-04-23 12:31:59 +00:00
Rhys Perry
0ee4fa33bc aco: schedule LDSDIR instructions 
fossil-db (navi31):
Totals from 33850 (42.63% of 79395) affected shaders:
MaxWaves: 1011236 -> 1011204 (-0.00%)
Instrs: 23589117 -> 23559185 (-0.13%); split: -0.21%, +0.08%
CodeSize: 126099716 -> 125968376 (-0.10%); split: -0.17%, +0.07%
VGPRs: 1348632 -> 1356012 (+0.55%); split: -0.09%, +0.63%
Latency: 183233795 -> 180997751 (-1.22%); split: -1.33%, +0.11%
InvThroughput: 27081576 -> 27056383 (-0.09%); split: -0.15%, +0.06%
VClause: 386453 -> 386551 (+0.03%); split: -0.11%, +0.13%
SClause: 811941 -> 813023 (+0.13%); split: -0.38%, +0.52%
Copies: 1279706 -> 1280051 (+0.03%); split: -0.46%, +0.49%
Branches: 416940 -> 416938 (-0.00%); split: -0.02%, +0.02%
VALU: 13566410 -> 13567367 (+0.01%); split: -0.04%, +0.04%
SALU: 1835804 -> 1835652 (-0.01%); split: -0.02%, +0.01%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11013
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
 2024-04-23 12:31:59 +00:00
Rhys Perry
0bc8a9be67 aco: make store clauses more aggressively 
Apparently this significantly improves performance of a radeonsi resolve
shader.

fossil-db (navi31):
Totals from 2372 (2.99% of 79395) affected shaders:
MaxWaves: 59903 -> 59863 (-0.07%)
Instrs: 3508838 -> 3506178 (-0.08%); split: -0.10%, +0.02%
CodeSize: 18516272 -> 18505956 (-0.06%); split: -0.07%, +0.02%
VGPRs: 152708 -> 154604 (+1.24%)
Latency: 27881253 -> 27861445 (-0.07%); split: -0.07%, +0.00%
InvThroughput: 4076649 -> 4076220 (-0.01%); split: -0.03%, +0.02%
VClause: 92696 -> 89409 (-3.55%); split: -3.55%, +0.01%
Copies: 310787 -> 311697 (+0.29%); split: -0.03%, +0.32%
VALU: 1891048 -> 1891933 (+0.05%); split: -0.01%, +0.05%
VOPD: 2534 -> 2559 (+0.99%); split: +1.07%, -0.08%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11014
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
 2024-04-23 12:31:59 +00:00
Rhys Perry
1bce498bbf aco: include LDSDIR in latency/etc stats 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28763>
 2024-04-23 12:31:59 +00:00
Samuel Pitoiset
e4f945cd4a vulkan: pass cmdbuf level to vk_command_buffer_ops::create() 
RADV needs to know the command buffer level in the create() helper.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28861>
 2024-04-23 06:33:31 +00:00
Samuel Pitoiset
095e3af2b0 radv: add RADV_DEBUG=psocachestats to report per-pipeline cache hits/misses 
This can be useful to make sure precompilation works as expected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
 2024-04-22 13:54:05 +00:00
Samuel Pitoiset
1f4ee45914 radv: rework pipeline cache search helpers 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
 2024-04-22 13:54:05 +00:00
Samuel Pitoiset
bbe52934b6 radv: use radv_pipeline::sha1 for graphics/compute pipelines 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
 2024-04-22 13:54:05 +00:00
Samuel Pitoiset
6e24da3ad4 radv/rt: move radv_ray_tracing_pipeline::sha1 to radv_pipeline 
To re-use it for graphics/compute pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
 2024-04-22 13:54:05 +00:00
Samuel Pitoiset
862d53f00a radv/rt: remove unnecessary param to radv_ray_tracing_pipeline_cache_insert() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28829>
 2024-04-22 13:54:05 +00:00
Rhys Perry
e0db4b458b radv: cache RT stage info 
If a RT pipeline misses the cache but it's imported stages hit the cache,
then can_inline might be false when it should be true.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28788>
 2024-04-22 11:55:26 +00:00
Joshua Ashton
122455b686 radv: Properly initialize imageCreateFlags in GetPhysicalDeviceVideoFormatPropertiesKHR 
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28841>
 2024-04-22 11:33:39 +00:00
Eric Engestrom
dc387e000c radeonsi/ci: update vangogh expectations after piglit uprev 
Fixes: ec45e8294c ("Uprev Piglit to f7ece74a107a2f99b2f494d978c84f8d51faa703")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28852>
 2024-04-22 12:14:44 +02:00
Konstantin
c2b1555a57 ac/parse_ib: Always print the value of the whole register 
ac_dump_reg is used by radv for dumping descriptors when writing a hang
report. Including the hex-value of the whole register help correlating
descriptors with SGPR values in the UMR wave dump.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28759>
 2024-04-20 08:29:23 +00:00
Konstantin
f4c6664d4b radv/debug: Dump descriptor binding information 
Can be useful for correlating offsets with descriptors.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28759>
 2024-04-20 08:29:23 +00:00
Konstantin
e27deed2ab radv/debug: Try to find unbound shaders 
Use radv_find_shader to correlate shaders to PCs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28759>
 2024-04-20 08:29:23 +00:00
Konstantin
23c167f826 radv: Canonicalize addresses in radv_find_shader 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28759>
 2024-04-20 08:29:23 +00:00
Konstantin
48b79a18c5 radv/debug: Canonicalize shader addr 
The most significant bits of the PC are cleared.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28759>
 2024-04-20 08:29:23 +00:00
Konstantin
9778e1b9a0 ac/debug: Handle the output of recent umr versions 
umr was changed to always display the human readable format.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10127
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28759>
 2024-04-20 08:29:22 +00:00
Timur Kristóf
65f5f1559f ac/nir/ngg: Fix packing 16-bit MS outputs. 
Fixes: 9f36fba9be

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28765>
 2024-04-20 09:30:34 +02:00
Timur Kristóf
c6c9da0336 ac/nir/lower_legacy_gs: Implement packed 16-bit GS outputs in non-dedicated slots. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28765>
 2024-04-20 09:30:32 +02:00
Timur Kristóf
abfce64880 ac/nir/lower_legacy_vs: Implement packed 16-bit VS/TES outputs in non-dedicated slots. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28765>
 2024-04-20 09:30:30 +02:00
Timur Kristóf
4a11323513 ac/nir/ngg: Implement packed 16-bit GS outputs in non-dedicated slots. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28765>
 2024-04-20 09:30:28 +02:00
Timur Kristóf
0f85f9060b ac/nir/ngg: Implement packed 16-bit VS/TES outputs in non-dedicated slots. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28765>
 2024-04-20 09:30:10 +02:00
Sergi Blanch Torne
ec45e8294c Uprev Piglit to f7ece74a107a2f99b2f494d978c84f8d51faa703 
dd6f7eaf82...f7ece74a10

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28820>
 2024-04-19 11:25:20 +00:00
David Rosca
9bfb07586c radv/video: Implement per picture type min/max QP 
Bump required FW version for VCN 1 and 2.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28727>
 2024-04-19 09:51:07 +00:00
David Rosca
694cc4728d radv/video: Avoid resetting rate control every frame 
begin() resets rate control state, calling it every frame will cause
issues such as not reaching the desired target bitrate.
Rate control only has to be reset when changing rate control mode,
otherwise it's enough to update the parameters.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28727>
 2024-04-19 09:51:06 +00:00
David Rosca
1000260ed8 radv/video: Set maxSublayerCount to 4 for H265 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28727>
 2024-04-19 09:51:06 +00:00
Timur Kristóf
b3c6b48493 ac/nir/tess: Use LDS IO mapping when loading tess levels from LDS. 
By accident, the VRAM mapping was used. This doesn't cause issues
in practice because the offsets are really the same, but it's still
better to fix this.

Fixes: c61eb54806
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:24 +00:00
Timur Kristóf
0fdb388698 ac/nir/tess: Split I/O mapping to two functions. 
No functional changes, just improves code clarity.

Fixes: c61eb54806
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:24 +00:00
Timur Kristóf
2d9e38dbe5 radv: Calculate VRAM tess patch size independently of LDS size. 
We recently made some effort to reduce the LDS use of TCS:
The lowering no longer uses the same output location mapping when
storing TCS outputs to LDS and VRAM. This means that the same
patch will use a different amount of LDS and VRAM.

Therefore, we need to properly calculate the patch size in VRAM
when determining the number of output patches.

Fixes: 0e481a4adc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:23 +00:00
Timur Kristóf
8190a65c78 radv: Rename LDS related variables in get_tcs_num_patches. 
No functional changes, just improves code clarity.

Fixes: 0e481a4adc
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28739>
 2024-04-19 08:54:23 +00:00
Samuel Pitoiset
54b08d6bbf radv: return per plane requirements for disjoint images 
Returning the whole image size/alignment isn't wrong but it's wasteful
for disjoint images which requires a separate bound memory object per
plane.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10997
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28808>
 2024-04-19 08:17:55 +00:00
Samuel Pitoiset
e18cc3b39b radv: fix waiting for occlusion queries on GFX6-8 
Occlusion queries don't go through L2 on GFX6-8, and waiting properly
in shaders is more complicated to implement. Use the previous
WAIT_REG_MEM logic on these GPUs to fix this.

This fixes flickering on many games on GFX8.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8954
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9415
Fixes: d44651bfc3 ("radv: wait for occlusion queries in the resolve query shader")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28796>
 2024-04-19 07:36:37 +00:00
Timur Kristóf
3279abd494 radv: Rename per_vertex_shaded_mask to explicit_strict_shaded_mask. 
This better describes what it actually is.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764>
 2024-04-18 18:35:07 +00:00
Timur Kristóf
3dd758f72c radv: Allow using high 16 bits of PS input slots. 
Add a new float16_hi_shaded_mask to keep track of which PS input
slots use their high 16 bits, based on the high_16bits of the
NIR IO semantics. Then, set ATTR1_VALID accordingly.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764>
 2024-04-18 18:35:07 +00:00
Timur Kristóf
12c0c20ed1 radv: Remove superfluous bool arg from slot_to_ps_input. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764>
 2024-04-18 18:35:07 +00:00
Timur Kristóf
a4cf36998f radv: Refactor emitting PS input types. 
Instead of taking a lot of booleans, refactor offset_to_ps_input
to take an enum which represents the PS input type. This helps
code readability as we keep adding more and more input types.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764>
 2024-04-18 18:35:07 +00:00
Timur Kristóf
c471aed748 radv: Only consider interpolated inputs as 16-bit float. 
Enabling FP16_INTERP_MODE makes no sense for other types of inputs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764>
 2024-04-18 18:35:07 +00:00
Timur Kristóf
afb08ee244 radv: Run DCE before deleting I/O variables. 
Apparently, nir_lower_io leaves dead code in shaders, which
prevented us from deleting the IO variables properly.

Fixes: dbfb96f08f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28764>
 2024-04-18 18:35:07 +00:00
Eric Engestrom
71b93f63dd radv: initialize a couple of variables 
Because musl will lose (in the next commit) the ability to see that they are initialized...

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28800>
 2024-04-18 14:26:37 +00:00
Samuel Pitoiset
b67f9b4d0d radV/ci: reduce the parallelism of navi21 to 3 
With CTS 1.3.8.0 the execution time has been reduced a lot.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28795>
 2024-04-18 09:24:22 +00:00
Samuel Pitoiset
6ee39b1870 radv/ci: update lists for TAHITI and Zink/Polaris10 
1f4662cc4e introduced regressions.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28795>
 2024-04-18 09:24:22 +00:00
Samuel Pitoiset
e85b2641a1 radv/ci: add one more flake since CTS 1.3.8.0 for RENOIR 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28795>
 2024-04-18 09:24:22 +00:00
Samuel Pitoiset
40f39482e1 ci: uprev CTS to vulkan-cts-1.3.8.0 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27459>
 2024-04-17 21:22:36 +00:00
Samuel Pitoiset
74615bb704 radv: clear color attachments without exports before compaction 
For PS epilogs, this isn't necessary because spi_shader_col_format is
already cleared. This will help for implementing color attachment
remapping because colors_written is always the original mapping.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28781>
 2024-04-17 13:58:37 +00:00
Samuel Pitoiset
26d9e9bdb5 radv/rt: add radv_rt_pipeline_compile() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28760>
 2024-04-17 06:54:36 +00:00
Samuel Pitoiset
07f3b9aaed radv/rt: insert shaders to cache right after they are compiled 
No need postpone this.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28760>
 2024-04-17 06:54:36 +00:00
Samuel Pitoiset
6dc5b6ee60 radv/rt: rework handle_from_stages to pass hashes directly 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28760>
 2024-04-17 06:54:36 +00:00
Samuel Pitoiset
6979b1ea3d radv/rt: initialize shader group capture/replay in a separate function 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28760>
 2024-04-17 06:54:36 +00:00