Samuel Pitoiset 6dc5b6ee60 radv/rt: rework handle_from_stages to pass hashes directly ... Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28760>		2024-04-17 06:54:36 +00:00
..
addrlib	amd: fix addrlib regression	2024-03-22 08:25:21 +00:00
ci	radv: stop ignoring shader stages that don't need to be imported with GPL	2024-04-12 06:24:43 +00:00
common	ac/nir/ngg: Enable packing 16-bit mesh shader outputs.	2024-04-16 14:08:31 +02:00
compiler	aco/tests: remove LLVM 11 code	2024-04-16 15:46:19 +00:00
drm-shim	amd: Use align64 instead of ALIGN for 64 bit value parameter	2024-01-03 22:02:17 +00:00
llvm	nir: add nir_intrinsic_optimization_barrier_sgpr_amd	2024-04-13 16:45:08 +00:00
registers	amd/registers: add correct gfx11.x enums for BINNING_MODE	2024-03-11 23:36:55 +00:00
vpelib	radeonsi/vpe: support vpe 1.1	2024-03-25 00:59:02 +00:00
vulkan	radv/rt: rework handle_from_stages to pass hashes directly	2024-04-17 06:54:36 +00:00
meson.build	amd,radeonsi: add libvpe	2023-12-01 00:23:38 +00:00