fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2025-12-22 22:10:10 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1
123203 commits 64 branches 914 tags 1 GiB
Commit graph

123203 commits

This branch
This branch
All branches
Author SHA1 Message Date
Lionel Landwerlin
cdc4377591 util/sparse_free_list: manipulate node pointers using atomic primitives 
Probably doesn't fix anything but those should be accessed in an
atomic way just like the head pointer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: e4f01eca3b ("util: Add a free list structure for use with util_sparse_array")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4613>
 2020-04-18 12:18:03 +00:00
Timothy Arceri
36d2a0eed6 glsl: only set stage ref when uniforms referenced in stage 
This updates the NIR uniform linker to behave like the GLSL IR
linker and fixes a number of CTS tests once we enable the NIR
linker for glsl.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
6afd0954e1 glsl: pull mark_array_elements_referenced() out into common helper 
We will reuse this helper in the NIR linker in the following
patches.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
5d992b539e glsl: fix block index in NIR uniform linker 
We only want to set the index for the first block of an array. Also
add a comment about why we do not break here.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
5dbebf4982 glsl: error check max user assignable uniform locations 
This adds the error check to the NIR uniform linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
c7355c4fb9 glsl: fix explicit locations for the glsl linker 
We already reserved explicit locations in the GLSL linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
5442712c6d Revert "glsl: fix resizing of the uniform remap table" 
This reverts commit e0aa0a839f.

Instead we fix it correctly in the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
723edf859f glsl: tidy up uniform storage value count code in NIR linker 
This makes the code cleaner and better reflects what the existing
glsl IR  linker does possibly fixing subtle bugs.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
3e2dbb6e70 glsl: fix struct offsets in the nir uniform linker 
This change properly applies layouts to structs of uniforms in a
similar way to the GLSL IR linker.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Timothy Arceri
c19ebca308 nir: add matrix_layout to nir_variable data 
This will be used by the following patch.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4623>
 2020-04-18 11:50:44 +00:00
Lionel Landwerlin
f27c707585 anv: skip writing perfcntr in results on Gen12+ 
We were not capturing the register already so don't bother writing the
delta in the results (we were previously doing a delta between two 0
values).

v2: Fix unused function warning

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
 2020-04-18 13:32:27 +03:00
Lionel Landwerlin
086ea1ac7e intel/perf: Enable MDAPI queries for Gen12 
We're missing the cases for gen12 leading to those metrics going
missing.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 15b7b56eb2 ("intel/perf: add TGL support")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4586>
 2020-04-18 02:04:09 +03:00
Alyssa Rosenzweig
29fb5451a9 pan/bit: Add fp16 min/max tests 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
532dfebc71 pan/bit: Add constants test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
15fe8d5d7b pan/bit: Add fexp2_fast test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
20f255b18e pan/bit: Add fexp2_fast interp 
Kind of a hack and not at all how the h/w does it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
8890fa4050 pan/bit: Add FMA_MSCALE test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
b7dd5b579d pan/bit: _MSCALE interp 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
1e3960a725 pan/bit: Add BI_TABLE test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
93fffd8a11 pan/bit: Add log2 helper interp 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
1c45b58ceb pan/bit: Add FMA_REDUCE test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
5546d1958b pan/bit: Add BI_REDUCE_FMA interp 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
68b4e708f1 pan/bit: Add frexp_log test 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
36cfe722e5 pan/bit: Add FREXP interp support 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
c05860789a pan/bi: Lower special ops to 32-bit 
We don't have 16-bit tables. We could probably do a bit better to avoid
so many conversions but hey.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
4d0f941036 pan/bi: Round constants to 32-bit 
We can only access lo/hi at 32-bit intervals.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:36 -04:00
Alyssa Rosenzweig
d30df466b5 pan/bi: Dump extra bits for disasm 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
590d66fa0c pan/bi: Pack MAX.v2f16 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
f87403c4c1 pan/bi: Pack ADD.v2f16 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
7e76c2b806 pan/bi: Structify add and min/max fp16 ADD 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
1647884cec pan/bi: Workaround constant packing errata 
Incomplete fix.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d772bf0101 pan/bi: Try to reuse constants in ALU 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
aba7f09902 pan/bi: Handle st_vary with <4 components 
Still no writemasks.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
438e445e17 pan/bi: Fix vec2/3 handling 
Otherwise we get moves from null.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
031ad0ecc2 pan/bi: Implement flog2 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
8e52206dbe pan/bi: Add fexp2 implementation 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
b1d4d8f743 pan/bi: Fix lower_combine swizzle rewrite 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
60f252708f pan/bi: Fix packing with low-nibble-set on hi constant 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
10fb5fb460 pan/bi: Fix packing with multiple constants 
Need to use bottom nibble of the 64, not the half.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
86c2a6b9fe pan/bi: Fix bi_get_immediate with multiple imms 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
df69304ac8 pan/bi: Ensure CONSTANT srcs have types 
So the next commit is valid.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
8f70f4432c pan/bi: Split src/dest index printing 
So we can handle constant printing correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
db5c1ae8fd pan/bi: Add fexp2_fast packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
c3eebfeb11 pan/bi: Pack FMA_MSCALE 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
0cb703984e pan/bi: Structify FMA_MSCALE 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
4570c34fc7 pan/bi: Add _MSCALE flag for FMA/ADD 
So we can bias by exponents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d3643cdd81 pan/bi: Add log2_help packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
6039d51e32 pan/bi: Pack ADD_FREXPM 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
ffa9f6a789 pan/bi: Add bi_pack_fma_2src helper 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
9904ed170a pan/bi: Add frexp_log packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00