Commit graph

144748 commits

Author SHA1 Message Date
Iago Toral Quiroga
871a7536e8 broadcom/compiler: don't over-estimate latency of TMU instructions
Over-estimating latency can cause us to delay the critical paths of
the shader unnecessarily, producing larger QPU programs that take more
time to execute as a result (and it also adds register pressure) so
striking a balance is important. The thread switching model in V3D
is quite effective at hiding latency and usuallly we just need to
hint it to delay TMU instructions a little bit to find the best
compromise for performance.

The new latency numbers have been chosen empirically by testing
V3DV with Sponza and a few UE4 samples.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17451>
2022-07-11 10:34:58 +00:00
Iago Toral Quiroga
f227aa7c98 broadcom/compiler: don't try to hide TMU latency at QPU scheduling
Based on empirical testing with Sponza and a few UE4 samples this is
consistently slightly benefitial for performance.

The most likely reason why this helps is that thrsw is probably
already quite effective at hiding latency and we are already trying
to hide latency at NIR scheduling and also via TMU pipelining, so
piling up on this when scheduling QPU typically ends up providing no
benefit at all for latency and is instead possibly preventing us to
unblock critical paths in the shader that depend on the TMU result,
requiring us to execute more cycles to complete the program.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17451>
2022-07-11 10:34:58 +00:00
Daniel Schürmann
66d46a23fb aco: fix packed 16bit fneg/fsat optimization
Make sure that the Operand is '1.0.xx'.

Fixes: b03be30e07 ('aco: optimize packed fneg')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17395>
2022-07-11 10:10:00 +00:00
Tatsuyuki Ishi
11fd0e1dda amd: Revert gfx10 addrlib changes
These broke a bunch of RADV VK CTS tests.
Revert the ADDR_SW_4KB_R_X changes from the commit to get CTS passing again.

Fixes: 3514b73244 ("amd: update addrlib - trivial changes")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6844
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17453>
2022-07-11 09:10:16 +00:00
Daniel Schürmann
676700d660 radv/shader_info: fix load_frag_coord and load_sample_pos read masks
Fixes: a8c471f962 ('radv: gather more information about PS in the shader info pass')
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17417>
2022-07-11 06:36:45 +00:00
Samuel Pitoiset
30846f1596 radv: remove the radv_report_apu_as_dgpu workaround for Red Dead Redemption 2
This workaround looks actually broken. We added it in the past
because otherwise the game would just report 3GiB of video memory
(ie. size of GTT on SD). Though, with this workaround enabled, the
game explodes in memory easily.

One theory is that because we fake integrated GPUs as discrete GPUS,
and because we report 6GiB of VRAM (ie. driver redistributes memory
for small carveout), the game thinks there is 6GiB of VRAM only and
then keep allocating stuff.

People reported that the memory explosion is gone without this
workaround applied and I confirmed this myself.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17421>
2022-07-11 06:04:03 +00:00
Gert Wollny
b45cec260c r600/sfn: Add missing copyright information
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17450>
2022-07-11 05:45:26 +00:00
Pavel Ondračka
42a3d22f16 r300: Keep rc_rename_regs() from overflowing RC_REGISTER_MAX_INDEX
This pass tries to move register usage closer to SSA, and for large
shaders this means we can overflow the register index, which only has
RC_REGISTER_INDEX_BITS size. This creates invalid code and leads to
crash at a later stage. Limit the pool of available registers to
RC_REGISTER_MAX_INDEX, currently is was two times the number of
shader instructions.

This means we'll fail the compile right away if we wanted more than
RC_REGISTER_MAX_INDEX temps, but when we've got that many we're
already well past how many instructions we can support anyway.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6017
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17393>
2022-07-11 03:38:59 +00:00
Alyssa Rosenzweig
befc68ec33 nir/opt_shrink_vectors: Round to supported vec size
The set of supported vector sizes in NIR has holes in it. For example, we
support vec5 and vec8, but not vec6 or vec7. However, this pass did not take
that into account, and would happily shrink a vec8 down to a vec7, causing NIR
validation to fail. Instead, the pass should round up to the next supported
vector size.

Fixes NIR validation fail in OpenCL's test_basic hiloeo subtest.

v2: Clamp -> round rename.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17194>
2022-07-10 18:03:46 +00:00
Mike Blumenkrantz
21b3a23404 mesa: fix SignalSemaphoreEXT behavior
the EXT_external_object spec originally was underspecified with regards
to this function, leaving room for synchronization errors where:
* app calls SignalSemaphoreEXT to signal a semaphore
* mesa defers pipe_context::fence_server_signal with threaded context
* driver defers gpu submission
* SignalSemaphoreEXT has long since returned, app submits vk cmdbuf waiting on semaphore
* spec violation / device lost

to prevent this, the spec is being changed to:
1) require an implicit flush when calling SignalSemaphoreEXT
2) require that this implicit flush also forces GPU submission before SignalSemaphoreEXT returns

all affected drivers have been updated

fixes #6568

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17376>
2022-07-10 16:15:17 +00:00
İlhan Atahan
4bd128f748 Add Adreno 616 and 620 to use turnip on these GPU's .
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17441>
2022-07-10 15:36:52 +00:00
Emma Anholt
e9840e409f vc4: Add notes on the remaining dEQP failures.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17350>
2022-07-10 02:50:09 +00:00
Emma Anholt
48a9196632 vc4: Move previous existing 3D xfails up to the group of 3d xfails.
Clears up known issues from ones that should be investigated and
explained.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17350>
2022-07-10 02:50:09 +00:00
Emma Anholt
426c7b65db vc4: Disable OES_texture_3D being exposed.
The hardware doesn't support 3D textures.  We had been lying about 3D
texture level support in the past so that we got GL 2.1, but now reporting
levels==0 doesn't disable GL 2.1 (since we don't check for GL2 extensions
any more).  But, by not lying, we now fix the majority of the remaining
GLES2 deqp failures.

This regresses a few desktop GL piglits which get GL errors that they
notice instead of what would be silent rendering failures on 3D texturing
operations.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17350>
2022-07-10 02:50:09 +00:00
Emma Anholt
421aa5dfac mesa/st: Disable OES_texture_3D for PIPE_CAP_MAX_TEXTURE_3D_LEVELS==0.
This will be used for vc4, where incorrectly exposing 3D textures accounts
for most of the GLES2 conformance failures it has.  This leaves
EXT_texture3d exposed in the (already non-conformant) GL2.1 support it
exposes, which has always been a best-effort thing.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17350>
2022-07-10 02:50:09 +00:00
Marek Olšák
b8397991c8 util: remove now unused debug_assert
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17403>
2022-07-10 00:50:35 +00:00
Marek Olšák
c9ca8abe4f Change all debug_assert calls to assert
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17403>
2022-07-10 00:50:35 +00:00
Marek Olšák
2f01a22fe4 util: remove our redefinition of assert
I think we can all agree that our own assert is unnecessary.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6780

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17403>
2022-07-10 00:50:34 +00:00
Marek Vasut
c73cc1785a dri: Check buffer height and avoid overflow
The dri2_allocate_buffer() can be called with arbitrary height, however
the struct pipe_resource .height0 member is uint16_t. Check height for
maximum size to avoid overflow. Note that .width0 is unsigned int, so
it does not have the same issue.

The uint16 limit comes from commit:
e6428092f5 ("gallium: decrease the size of pipe_resource - 64 -> 48 bytes")

The overflow can be triggered e.g. by requesting large BO:
```
gbm_bo_create(dev, 1, 640*480*4, GBM_FORMAT_R8, GBM_BO_USE_LINEAR);
```

Signed-off-by: Marek Vasut <marex@denx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16513>
2022-07-09 22:07:14 +00:00
Marek Olšák
3b36700162 radeonsi: fix random PS wave size
Fixes: b3b2f97f2e "radeonsi: add Wave32 heuristics and shader profiles"

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17410>
2022-07-09 21:00:51 +00:00
Marek Olšák
9a39da359e ac/surface: expose all 64K_R_X and 256K_R_X modifiers on gfx11
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17410>
2022-07-09 21:00:51 +00:00
Marek Olšák
3514b73244 amd: update addrlib - trivial changes
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17410>
2022-07-09 21:00:51 +00:00
Jesse Natalie
5a59211acd dzn: Use fabs on floating point input
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17423>
2022-07-09 14:04:48 +00:00
Jesse Natalie
2ace7832f9 dzn: Re-order dzn_physical_device_desc so = { 0 } doesn't initialize a struct
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17423>
2022-07-09 14:04:48 +00:00
Jesse Natalie
e0ebae8dca dzn: Fix comparison order for format enums
Fixes: 53a352e1 ("dzn: Provide a helper to check if 2 formats are compatible")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17423>
2022-07-09 14:04:48 +00:00
Jesse Natalie
6c1ab8fdeb dzn: Disable Wunused-value for C++ files
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17423>
2022-07-09 14:04:48 +00:00
Jesse Natalie
10e8e0b9d6 dzn: Only add Werror flags that the compiler supports
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17423>
2022-07-09 14:04:48 +00:00
Jesse Natalie
4ea58cf35f dzn: Re-order includes in dzn_nir to prevent TRUE redefinition
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17423>
2022-07-09 14:04:48 +00:00
Bas Nieuwenhuizen
f905edb199 radv: Expose VK_KHR_performance_query.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:06 +00:00
Bas Nieuwenhuizen
1a5a3ca9cc radv: Implement listing performance counters.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:06 +00:00
Bas Nieuwenhuizen
eb669b94ee radv: Implement support for querying performance counters.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:06 +00:00
Bas Nieuwenhuizen
439e4b5c88 radv: Add a list of performance counters.
Plus helpers that will be shared for listing counters + doing the
actual queries.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:06 +00:00
Bas Nieuwenhuizen
10211913e1 radv: Add perf counter lock/unlock commandbuffers.
These set the pass and make sure we don't have multiple submissions
at the same time touching the perf counters/pass at the same time.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:06 +00:00
Bas Nieuwenhuizen
5d52f12419 radv: Add helper BO for perf counters.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
Bas Nieuwenhuizen
2769018e39 radv: Make inhibiting clockgating not static.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
Bas Nieuwenhuizen
80a3c218eb radv: Rename SPM functions.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
Bas Nieuwenhuizen
f7d8e64f51 radv: Add pstate locking for perfcounters.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
Bas Nieuwenhuizen
e60ee3524f radv: move ac_perfcounters to physical_device.
Going to need it there for vkGetPhysicalDeviceQueueFamilyPerformanceQueryPassesKHR.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
Bas Nieuwenhuizen
6cfc2e91e8 radv: Add performance counter reg write.
Needed for reliably writing performance counter selectors.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16879>
2022-07-09 12:29:05 +00:00
David Heidelberg
71b32a9f75 docs: briefly document Gallium Nine
Credits: Axel Davy, lorn10, Pavel Ondračka

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4937

Acked-by: Filip Gawin <filip@gawin.net>
Acked-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17154>
2022-07-09 10:49:12 +00:00
Kenneth Graunke
c08f51d0cf intel/compiler: Don't set SBID on EOT send messages
The send message with EOT is the last instruction so there's no need to
set any SWSB annotations for future instructions.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17202>
2022-07-09 05:26:25 +00:00
Lionel Landwerlin
a4c5521ea9 nir/serialize: restore ray query variables
The ray query status of a variable is tracked in the
nir_variable::data. We need to store it in the serialization otherwise
restoring NIR from a cache will drop the annotation.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5a9cdab170 ("nir: track variables representing ray queries")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16059>
2022-07-09 00:32:00 +00:00
Jason Ekstrand
90114fb034 anv: Implement VK_EXT_shader_module_identifier
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
530de844ef intel,anv,iris,crocus: Drop subgroup size from the shader key
Use nir->info.subgroup_size instead.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
e9b2862c1a anv: Use vk_pipeline_shader_stage_is_null()
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
c5af8bcc37 vulkan: Add a vk_pipeline_shader_stage_is_null() helper
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
62915eb4fe anv: Use vk_pipeline_shader_stage_to_nir
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
c2b3d9ca2b anv: Put a VkPipelineShaderStageCreateInfo* in anv_pipeline_stage
It's an entirely temporary struct used by the compile process and never
escapes vkCreate*Pipelines so it's safe to just stuff the pointer in
there.  This makes it easier to use some of our new helpers.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
56b815e91d anv: Drop unnecessary parameters to anv_pipeline_compile_cs
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Jason Ekstrand
b2ab6d10e4 mesa,glsl,ttn: Set subgroup_size to UNIFORM
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00