Commit graph

193784 commits

Author SHA1 Message Date
Mike Blumenkrantz
86bb1036e2 device_select: shortcut EnumeratePhysicalDevice* for count-only calls
Fixes: 991cc686a5f (egl: really fix kopper fd passing)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30647>
2024-08-21 16:51:19 +00:00
Mike Blumenkrantz
39ae6a891d device_select: reorder CreateInstance to have shorter failure paths
no functional changes

Fixes: 991cc686a5f (egl: really fix kopper fd passing)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30647>
2024-08-21 16:51:19 +00:00
Boris Brezillon
3b2de16fa5 panvk/ci: Enable clearing tests
After the transition to vk_meta, all clear tests seem to pass.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:36 +00:00
Boris Brezillon
a31a55d348 panvk: Lower var copies before lowering IOs
Variable copy lowering might generate new IOs, so let's make sure
those are lowered before the IOs.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:36 +00:00
Boris Brezillon
4ecfc45cd0 panvk: Allow ZS formats on 1D/3D images
There's no real blocker here, so let's just allow it.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
213e895da0 panvk: Allow compressed formats
Compressed formats were disabled because of the different layout for
u_interleaved(compressed), where the 16x16 texel tile model for
non-compressed is replaced by a 4x4 block tile. This prevents us from
creating RGBA views of compressed images, which break copies.

The simple option is to keep compressed images linear. The more complex
one would be to patch coordinates/frag-coords on the shader side when
we're dealing with a compressed texture/color-attachment, but given
we're using vk_meta for copies, it's not something we can easily do,
so let's go for the first option and see if we want to revisit it
later.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
4a30a28653 panvk: Fix depth-stencil AFBC support
When both the depth and stencil attachments are enabled, and the
underlying image is AFBC, it must be an combined Z24S8 format.

Make sure this is the case when initializing the fbinfo object.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
baf8570b28 panvk: Add support for render-pass resolve operations
Use vk_meta_resolve_rendering() to handle render-pass resolves.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
0b08826f7d panvk: Lower load_multisampled_pan
Needed if the fragment shader writes gl_SampleMask.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
5067921349 panvk: Switch to vk_meta
Replace our custom panvk_meta stuff by something based on vk_meta.
That's less gen-specific code to maintain which will help with v10
support.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
38258138ad panvk: Rework the modifier selection
We move the modifier selection after the panvk_image initialization
so we have less VkXxx objects to retrieve, and split the 3 cases
(explicit modifier, explicit modifier list ordered by preference and
driver auto-selection based on the image attributes) to make things
clearer.

We also check formats against the pan_best_modifiers array which is
sorted by GPU order of preference and serve as an is_valid_modifier()
too.

Finally, we add the following new constraints on u-tiled/AFBC:
- don't allow u-tiled on images with compressed formats that might have
  non-compressed views
- don't allow u-tiled or AFBC on 1D images

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
f74dd596d5 panvk: Add helpers to save/restore the compute/graphics state for meta operations
Those helpers will be used to save/restore the command buffer
state when calling vk_meta helpers.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
c912f80a08 panvk: Constify the shader pointers in the graphics state
The command buffer logic is not supposed to modify these objects.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
495b718b3f panvk: Rework the NULL test in panvk_buffer_{gpu_ptr,range}()
We are about to allow buffer memory allocation from the cmd_buffer
memory pool. In order to allow that, we need to tweak the NULL checks
done in panvk_buffer_{gpu_ptr,range}() to use the device address
instead of the bo field.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
1b16f9ec05 pan/texture: Allow uncompressed view of compressed image
Needed image copies in Vulkan, where we create RGBA views of
compressed images to do the copy.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
8eec3284e1 panvk: Add missing vk_device_finish() calls
We do free the device object, but never call vk_device_finish() on
it.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Boris Brezillon
fd8700b793 panvk: Rename the error labels in create_device()
It's usually clearer to describe what the error unwinding entrypoint
does than which type of error it's supposed to handle, because some
entrypoints can be called from different error paths.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29451>
2024-08-21 16:14:35 +00:00
Eric Engestrom
91c9393da1 ci/build: add honeykrisp (asahi vk) to several builds
Specifically:
- `alpine-build-testing`
- `fedora-release`
- `.meson-arm` (inherited by all the arm build jobs)
- `debian-arm64` (because it overrides the inherited list)
- `debian-vulkan`

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30658>
2024-08-21 15:32:54 +00:00
Boris Brezillon
b3a2233f88 panvk: Don't spam the error output if the device is not for us
The Vulkan loader tries each driver until it finds one that's accepting
the device. Don't complain about panvk being non-conformant until we're
sure the device is for us.

Reported-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Rob Clark <robclark@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30756>
2024-08-21 15:18:49 +00:00
Samuel Pitoiset
6fa1bf3b88 radv: pad GFX preambles IBs with only one NOP
This is optimal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30743>
2024-08-21 14:55:04 +00:00
Samuel Pitoiset
d690f293c6 radv/winsys: pad gfx and compute IBs with only one NOP
1-dword NOPs are slow and it's better to emit a sized NOP packet when
possible.

Based on RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30743>
2024-08-21 14:55:04 +00:00
Rohan Garg
29a2e5358d anv: enable KHR_shader_relaxed_extended_instruction
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30726>
2024-08-21 14:13:46 +00:00
Rohan Garg
52c8e6da69 vtn: handle SpvOpExtInstWithForwardRefsKHR for non semantic instructions
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30726>
2024-08-21 14:13:46 +00:00
Konstantin
19d633af0b radv: Handle repeated instructions when splitting disassembly
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30734>
2024-08-21 13:38:53 +00:00
Konstantin
1cf507b806 radv: Handle instruction encodings > 8 bytes when splitting disassembly
Choosing the wrong instruction length prevents
radv_dump_annotated_shader from matching waves.

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30734>
2024-08-21 13:38:53 +00:00
Rhys Perry
db39685e31 aco: validate temporary reachability
These errors are nicer to read than the ones from live variable analysis.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30440>
2024-08-21 10:47:20 +00:00
Rhys Perry
39270a8be3 aco: preserve SSA in try_eliminate_scc_copy
Otherwise, there is no definition of this temporary. Fixes fail in future
validation.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30440>
2024-08-21 10:47:20 +00:00
Rhys Perry
d81d5b7d00 aco: use dominance helpers
This makes the passes slightly faster.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30440>
2024-08-21 10:47:20 +00:00
Rhys Perry
d91e634c13 aco: calculate indices from dominance tree
This lets us do fast dominance checks.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30440>
2024-08-21 10:47:20 +00:00
Eric Engestrom
b537c06db4 broadcom/ci: increase the timeout of the nightly job v3d-rpi4-gl:arm32 by 10min
+5min might be enough but let's have 5 more minutes of margin.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30694>
2024-08-21 08:52:41 +00:00
Eric Engestrom
dd694ac6e5 broadcom/ci: set default TEST_PHASE_TIMEOUT_MINUTES so that jobs never timeout without uploading results
The CI-wide default is 20min, so if we set a 20min job timeout here, we
can't get the results of our jobs when they timeout.

Instead of setting the test timeout to 15min, which would be too short
for some jobs, leave it at 20min (but be explicit about it and protect
against a future change of that default), and bump the job timeout by
5min to allow for results to be uploaded.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30694>
2024-08-21 08:52:41 +00:00
M Henning
47a2ab6f3f nv/codegen: Stop overaligning var_function_temp
This was a hack to work around MemoryOpt brokenness.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:45 +00:00
M Henning
86fb61b6dc nv/codegen: Use nir_opt_load_store_vectorize
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:45 +00:00
M Henning
8887f620b8 nv/codegen: Modify nir pass order
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:45 +00:00
M Henning
3dbb28dc89 nv/codegen: Vector store ssbo/global/shared/scratc
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:45 +00:00
M Henning
710f5703cd nv/codegen: Vector load ssbo/global/shared/scratch
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:44 +00:00
M Henning
64e27b2af1 nv/codegen: Limit MemoryOpt to input/output/const
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:44 +00:00
M Henning
672246f0fa nv/codegen: Use nir_lower_mem_access_bit_sizes
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:44 +00:00
M Henning
73947493e2 nv50_ir_from_nir: Use getFile() more often
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:44 +00:00
M Henning
879343839b nv50/peephole: merge/split can swap word order
and we would prevoisly incorrectly apply MergeSplits in this case

That is,
    a, b = split(x)
    y = merge(b, a)
could be incorrectly optimized to
    y = x
before this commit

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24984>
2024-08-21 02:59:44 +00:00
Francisco Jerez
71ca8529c5 intel/brw/gfx12.5+: Fix IR of sub-dword atomic LSC operations.
We were currently emitting logical atomic instructions with a packed
destination region for sub-dword LSC atomics, along the lines of:

> untyped_atomic_logical(32) dst<1>:HF, ...

However, these instructions use an LSC data size D16U32, which means
that the 16b data on the return payload is expanded to 32b by the LSC
shared function, so we were lying to the compiler about the location
of the individual channels on the return payload, its execution
masking, etc.  This is why the hacks that manually set the
'inst->size_written' of the instruction were required.

In some cases this worked, but any non-trivial manipulation of the
instruction destination by lowering or optimization passes could have
led to corruption, as has been reproduced in deqp-vk during
lower_simd_width() for shaders that use 16-bit atomics in SIMD32
dispatch mode.

Note that LSC sub-dword reads aren't affected by this because they use
raw UD destinations and specify the actual bit size of the operation
datatype as the immediate SURFACE_LOGICAL_SRC_IMM_ARG, which doesn't
work for atomic operations since that immediate specifies the atomic
opcode.

Instead, have the logical operation implement the behavior of 16-bit
destinations correctly instead of silently replacing the 16-bit region
with an inconsistent 32-bit region -- This is done by emitting the MOV
instructions used to pack the data from the UD temporary into the
packed destination from the lower_logical_sends() pass instead of from
the NIR translation pass.

Fixes: 43169dbbe5 ("intel/compiler: Support 16 bit float ops")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30683>
2024-08-21 02:33:12 +00:00
Scott Moreau
7cbe8c390d egl: hook up swap interval bits when using zink on wayland
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25358>
2024-08-20 16:19:17 -06:00
Scott Moreau
a641ca34fa egl: small refactor to avoid code duplication
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25358>
2024-08-20 16:18:04 -06:00
M Henning
8ee7f89641 nouveau/codegen: Switch to derivative intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30747>
2024-08-20 21:59:54 +00:00
Nanley Chery
5e86087940 intel: Move depth clear value writes to drivers
This improves drivers in the following ways:

* iris_hiz_exec() and crocus_hiz_exec() gets rid of the narrowly-used
  update_clear_depth parameters.
* iris avoids fast-clearing if the aux state is CLEAR. crocus avoids
  this too, but didn't actually need it in the first place.
* iris updates the value once per fast_clear_depth() call instead of
  doing an update for each layer being cleared.
* anv now updates the clear value when transitioning from an undefined
  layout instead of doing so on every fast-clear. This should be safer
  because we don't perform state cache invalidates when changing the
  clear value. So, existing surface states won't have any stale values.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30520>
2024-08-20 21:29:43 +00:00
Nanley Chery
16f9b8e92c iris: Move a HIZ_CCS_WT fast-clear flush higher up
The next patch will be update the clear value. Move the stalling flush
to the top of fast_clear_depth() so that there are no users of the clear
value when it is replaced.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30520>
2024-08-20 21:29:43 +00:00
Nanley Chery
d7b0d32c28 intel/blorp: Simplify depth clear value updates
Use a single MI_STORE_DATA_IMM instead of five.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30520>
2024-08-20 21:29:43 +00:00
Nanley Chery
3294200098 intel: Add and use isl_get_sampler_clear_field_offset
Add and use a function which documents the sampler's behavior around
fast-clears on gfx11-12.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30520>
2024-08-20 21:29:43 +00:00
Nanley Chery
55dbc58bf4 iris: Invalidate state cache for some depth fast clears
We need to invalidate the state cache when updating the value in the
indirect clear color so that existing surface states can pick up the new
value.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30520>
2024-08-20 21:29:43 +00:00
Mike Blumenkrantz
c2dcecffc5 st/pbo: reject vs/fs pbo ops if rowstride < width
this pbo shader works by iterating over the framebuffer size
and storing a value to an offset for each source pixel. if the
number of pixels being written out does not correspond to fragcoord
to the extent that certain source pixels are not written at all, however,
then this method should not be used in order to avoid giving broken results

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30689>
2024-08-20 20:59:15 +00:00