Rather than emulating page tables, poorly, with a hash table, use a
red-black tree and store the intervals directly. This is deterministic
instead of probabilistic, attaining O(log n) performance for n mapped
intervals which is good enough. Unlike the hash table approach, this
allows us to iterate intervals easily.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14543>
Consider the following innocuous-looking code:
pan_merge(packed, vtx->attributes[i], ATTRIBUTE);
Under the current implementation, this code is completely broken. Why?
The current implemention is a macro which hardcodes the loop index i,
which shadows the i used to index attributes. Pull out a helper method
so we do the right thing without resulting to further preprocessor abuse
(__COUNTER__).
While making things more robust, assert the crucial pan_merge
invariant that the total size is a multiple of 4; if this fails, the
routine risks memory corruption.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14119>
Preload exactly what the shader needs, based on the compiler's mask of
uninitialized registers, rather than trying to sync pan_shader.h with
the behaviour of code gen. Would've saved me some debugging over the
years...
As a bonus this avoids preloading unnecessary registers, particularly in
compute shaders. In theory this should reduce power consumption.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14154>
Valhall v9 introduces a number of new data structures since Bifrost v7,
and removes a number of traditional data structures. Add decode routines
for the new Valhall data structures, and condition the old routines on
(PAN_ARCH <= 7) to remain buildable and warning-free.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Fork the latest canonical XML (Bifrost v7) and adapt to the data
structures found in the earliest Valhall GPU I could get my hands on
(Valhall v9). This should minimize the churn needed for the port by
keeping the Valhall model close to the Bifrost we already supported.
It is not known what happened to v8. It appears to have been yeeted from
existence.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
Although known fields wouldn't be given the type "hex", it is useful as
the default type for unknown fields while reverse-engineering, and as
such is used in the Valhall XML.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14063>
These kernels aren't tested (and are probably broken) elsewhere. Don't
waste cycles trying to compile for other architectures. This reduces the
amount of code that needs to be ported to a new architecture.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14064>
These flags control special CRC handling for empty tiles using the CRC
clear colour field added on Bifrost. Their use depends on CRC being
used. We missed these flags earlier; let's add them since they are used
by the Valhall DDK but are not new to Valhall.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13982>
Pattern match the point coord sysval and support lowering it as well.
This is required to handle flipped framebuffers on Bifrost. However,
what this pass normalizes to is the opposite of the hardware mode we
used on Bifrost before, so we need to swap modes at the same time to
prevent regressions.
Fixes Piglit glsl-fs-pointcoord and glsl-fs-pointcoord_gles2
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13073>
For each blend mode in our blending unit tests, add whether we can set
the alpha_zero_nop and alpha_one_store flags and check against the
predicates.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13508>
Some Mali GPUs can avoid storing to the tilebuffer if src alpha = 0, and
can replace blending with a store if src alpha = 1. This saves power in
the common case of alpha blending. Add predicates to check if these
optimizations are valid for a given blend equation.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13508>
Make it clear that the distinction is the facingness of the primitives
the depth bias applies to.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13509>
We need to know the internal (physical) formats used for AFBC of a given
logical format, in order to check format compatibility and determine if
we need to decompress AFBC for conformance.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
According to mali_kbase, all Bifrost and Valhall GPUs are affected by
issue TSIX_2033. This hardware bug breaks the INTERSECT frame shader
mode when forcing clean_tile_writes. What does that mean?
The hardware considers a tile "clean" if it has been cleared but not
drawn to. Setting clean_tile_write forces the hardware to write back
such "clean" tiles to main memory.
Bifrost hardware supports frame shaders, which insert a rectangle into
every tile according to a configured rule. Frame shaders are used in
Panfrost to implement tile reloads (i.e. LOAD_OP_LOAD). Two modes are
relevant to the current discussion: ALWAYS, which always inserts a frame
shader, and INTERSECT, which tries to only insert where there is
geometry. Normally, we use INTERSECT for tile reloads as it is more
efficient than ALWAYS-- it allows us to skip reloads of tiles that are
discarded and never written back to memory.
From a software perspective, Panfrost's current logic is correct: if we
clear, we set clean_tile_writes, else we use an INTERSECT frame shader.
There is no software interaction between the two.
Unfortunately, there is a hardware interaction. The hardware forces
clean_tile_writes in certain circumstances when AFBC is used.
Ordinarily, this is a hardware implementation detail and invisible to
software. Unfortunately, this implicit clean tile write is enough to
trigger the hardware bug when using INTERSECT. As such, we need to
detect this case and use ALWAYS instead of INTERSECT for correct
results.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13205>
AFBC is an optional feature on Bifrost. If it is missing, a bit will be
set in the poorly named AFBC_FEATURES register. Check this so we can act
appropriately.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13497>
The number of varying records we need to reserve in the worst case is
greater than the number of source-level varyings we advertise
(gl_Position, gl_PointSize...)
We advertise MAX_VARYINGS source level varyings, which means anywhere we
manipulate varyings we need up to (MAX_VARYINGS + max non-source level
varyings) records. Add a PAN_MAX_VARYINGS define for this and use it
throughout.
Fixes a buffer overflow in Piglit glsl-max-varyings, which now passes
instead of crashes.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13070>
The number of special varyings on midgard can influence how much space
we need to allocate for varyings in the compiler ABI. Move the enum so
we can get access it.
No functional change. This is cc stable purely so the following patches
can be backported.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13070>
ASTC textures all use a common ASTC format, with the ASTC block
dimension configured with auxiliary bits at the bottom of the payload
pointer. Add the corresponding enum for ASTC 2D and 3D.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12814>
Start with the enums that were manually redefined in
pan_{texture,format}.h and the blend equation descriptors.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12208>
When the render target format is raw, the swizzle is ignored. Let's
set it to identity to avoid misleading the pandecode reader into
thinking the swizzle is applied.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Suggested-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12793>
The output swizzle defined in the render-target descriptor is ignored
when the format is RAW. In that case, we have to swap the components
when lowering FB stores/loads if we want to get the right color.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12793>
Fixes several problems in the pan_blit() logic:
1. We actually need the reciprocal of the depth scaling in z_scale (maybe
we should rename this field z_scale_rcp to make it clear)
2. When Z end < Z start we should remove one to the cur_layer/layer_offset
instead of doing it on the last_layer field, otherwise there's an
off-by-one error
3. The Z src offset should be adjusted to account for scaling. If we don't
do that we won't sample from the right layer when upscaling.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12961>
Since we have no guarantee that start < end, we can't really tell to
which one the offset applies to. Let the caller take care of that.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12961>
Oh, the irony. I linked to this file in a software design class as an
example of how unit testing works under the hood, since it's not using
any particular testing framework. In doing so I realized the test is
totally broken. It doesn't matter -- the tests passed before, pass now,
and the code being tested is correct. But let's still fix the
embarassing logic error for future Panfrost hackers.
Fixes: d42e53c77a ("panfrost: Unit test clear colour packing")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13006>
DCD size on Bifrost is supposed to be 32 words wide, but this change
will only happen after the per-gen XML split. We have to manually append
the DRAW_PADDING for now.
Fixes: de13fdc251 ("panfrost: Prepare pandecode to per-gen XML")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12970>
The vulkan driver needs to patch job headers when re-issuing batches.
Extend pan_preload_fb() so it can return the emitted tiler jobs.
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12095>