Commit graph

173787 commits

Author SHA1 Message Date
Boris Brezillon
8568a46c1c renderonly: Fix potential NULL deref in the error path
scanout can be NULL.

Fixes: ad4d7ca833 ("kmsro: Fix renderonly_scanout BO aliasing")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23746>
2023-07-05 06:22:21 +00:00
Robert Beckett
8087f784e4 winsys/panfrost: Fix a scanout resource leak
Use ro->bo_map to alloc scanout and make sure we initialize the refcnt
to one.

This fixes leaking the scanout object and the underlying dumb-buffer.

Fixes: ad4d7ca833 ("kmsro: Fix renderonly_scanout BO aliasing")
Cc: mesa-stable
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Italo Nicola <italonicola@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23746>
2023-07-05 06:22:21 +00:00
Mike Blumenkrantz
46b488151f aux/trace: fix bindless texture dumping
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23971>
2023-07-05 05:32:21 +00:00
Alyssa Rosenzweig
a28f9738e1 asahi: Use txf_ms for MSAA background programs
Fixes regression in assorted dEQP tests including:

dEQP-EGL.functional.color_clears.multi_context.gles3.rgba8888_window

Fixes: d4424950ac ("asahi: Use txf for background program")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
02ac7305a0 agx: Don't leak ssa_to_reg_out
calloc'd in the RA, should be freed in the RA. Identified with valgrind.

Fixes: 6b13616cba2 ("agx: Implement vector live range splitting")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
2a334a9f4d asahi: Take ownership of compute shader NIR
Fixes massive leak of compute shader NIR. Identified with valgrind.

Yes, this requires casting away const *.

Yes, Gallium is dumb.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
a004d96874 asahi: Use ralloc harder
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
56461bc0a2 asahi: Fix scissor_culls_everything check
Account for the possibility that the scissor is outside the render area. Fixes
the usual assertion fail:

   glcts: ../src/gallium/drivers/asahi/agx_state.c:1015:
   agx_upload_viewport_scissor: Assertion `maxx > minx && maxy > miny' failed.

on the following dEQP tests with my conformance build:

  dEQP-GLES3.functional.fragment_ops.scissor.outside_render_line
  dEQP-GLES3.functional.fragment_ops.scissor.outside_render_point
  dEQP-GLES3.functional.fragment_ops.scissor.outside_render_tri

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
98de1b1b95 asahi: Assert we don't transition shared resources
This is an invariant maintained by all current callers and subtly required for
the BO swapping to work. Assert it to make it obvious.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
1140bdb783 asahi: Arrange VS varyings in the correct order
The GPU ABI requires varyings to be grouped as follows:

- Position
- Smooth shaded fp32
- Flat shaded fp32
- Linear shaded fp32
- Smooth shaded fp16
- Flat shaded fp16
- Linear shaded fp16
- Point size

Use the flat shaded mask info we now have in the vertex shader key to
sort things properly, and pass the counts to the hardware.
FP16 is still TODO.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
2055e03243 asahi: Add flat/linear shaded varyings mask to the VS shader key
We need this information in order to arrange varyings properly, which
means we need shader variants. Add this to the shader key, taking the
value from the FS input info.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
4a65b4bb14 asahi: Fix type confusion for fragment shader keys
We can't attempt to access the fs union member if this is not a FS.
That worked so far since there wasn't a VS shader key at all, but we're
about to introduce one.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
90834353a1 asahi: Gather flat/linear shaded input info from uncompiled FS
We need to propagate shading model metadata from the FS to the VS in
order to correctly lay out the uniforms in the right order. This means
we need VS variants depending on this data.

We could use the existing shader info structure, but that applies to
compiled shaders which would introduce a dependency from the VS compile
to the FS compile. This information does not change with FS variants, so
we can introduce an agx_uncompiled_shader_info structure and gather it
early at precompilation time.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
49994dc8cb asahi: Identify the separate varying count fields
Flat/goraud/linear and 32/16 need to be specified separately. This
change identifies the new fields but should be a functional no-op.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
d9bf52e00f agx: Assert that barriers are not used in the preamble
It is nonsensical and confuses the hardware.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
9bf7d14b2c agx: Use nir_opt_shrink_vectors
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
c81a14c754 agx: Use nir_opt_shrink_stores
This especially helps with image stores, where we otherwise insert a bunch of
pointless moves to collect a vector even when we know the format only has a
single channel.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
45cbe12282 asahi: Remove ; in perf_debug_ctx
Otherwise `if(x) perf_debug_ctx(); else if (y) ...` doesn't work.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
b57faede71 asahi: Identify PBE::sRGB flag
Needed to write out sRGB images correctly.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
6dc6991930 asahi: Rename 'Render Target' to 'PBE'
It's used for all PBE operations, including regular image writes, so use the
more general name. Compare the powervr driver.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
75b5bf8dbc asahi: Strip ? in GenXML
Sometimes it's nice to have boolean flags with ? in the name, allow this by
stripping ? when generating the sanitized C name.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Asahi Lina
850380cbf5 asahi: match_soa: Treat offsets as signed
An offset may be negative, indexing backwards from the array base.
When we right shift an offset by the format shift, we need to use a
signed shift to ensure that the resulting offset is still negative.

Fixes Nautilus faults/pink crashes.

Signed-off-by: Asahi Lina <lina@asahilina.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
a90b0743f3 agx: Smarten discard_agx -> sample_mask lowering
In 97a1bbeaf26 ("agx: Fix discards"), we made our discard lowering very simple,
since we had just discovered the underlying instruction behaviour and needed a
hotfix for misrendering in the wild. Now that we understand the behaviour, we
can do better. There are two potential performance issues with the lowering in
that commit:

1. It generates extra sample_mask instructions. For a shader that has a single
   discard_if at root level, it would generate two instructions

      sample_mask foo, 0
      sample_mask ~0, ~0

   rather than a single

      sample_mask ~0, ~foo

2. It runs depth/stencil testing/updates at the end of the shader, even when it
   could be run immediately after the discard. This might cause pipeline stalls.

The solution is to insert the "trigger testing" sample_mask instruction as soon
after the "discard" instruction as possible, fusing them if they would be next
to each other. There are two cases:

1. The last discard is executed unconditionally. In this case, we can test
   immediately after, unconditionally, and fuse together.

2. The last discard is executed conditionally. In this case, we test in the
   first unconditional block after the discard. Example shader:

   ...
   loop {
      if .. {
         loop {
            discard_if <-- discard here
            ...
         }
      ..
      }
   ...
   }
   <---- we test here
   ...
   store_output

Together this covers all the usual patterns for single-sampled discard. We could
still do better with multisampling, but whatever.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Alyssa Rosenzweig
5a4c9136cd agx: Add algebraic opt to help with discard lowering
When lowering discards, it will be convenient to generate the pattern:

   (cond ? 255 : 0) ^ 255

Add rules to optimize that to

   (cond ? 0 : 255)

This is not part of the main algebraic optimizer since this lowering happens
late.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23998>
2023-07-05 05:11:49 +00:00
Mike Blumenkrantz
54bd804ad3 zink: don't destroy swapchain on initial CreateSwapchainKHR fail
this used to be correct at some point but now it no longer is

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23970>
2023-07-05 04:22:23 +00:00
Dave Airlie
2fc2597fe5 gallivm: make block_size use discrete values.
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:40:44 +10:00
Dave Airlie
c0123d792c gallivm: convert grid_size to discrete values.
No use in storing this in a vector

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:40:41 +10:00
Dave Airlie
e021973f5a gallivm: convert block_id to discrete values.
There is no reason to stick these in a vector

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:40:31 +10:00
Dave Airlie
bcb5dbf232 gallivm: store thread id in separate values.
There is no real advantage to putting this into a vector to take
it back out again.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23997>
2023-07-05 11:39:59 +10:00
Hyunjun Ko
d0e6809ee5 anv/video: fix to support HEVC 10bit on some of 9th gens.
From Broxton and Kabylake, it started supporting HEVC 10-bit decoding.

Fixes: 649e12c897 ("anv_video: reject decoding of unsupported profiles
and formats")

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23985>
2023-07-05 00:20:18 +00:00
Joshua Ashton
59cf3702c4 radv: Remove unused pipeline param from radv_generate_pipeline_key
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:05:16 +01:00
Joshua Ashton
5ca8390e5f radv: Advertise VK_EXT_pipeline_robustness
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:05:09 +01:00
Joshua Ashton
c9ac960b6a radv: Implement VK_EXT_pipeline_robustness
Funnel the data from the pNext into the new pipeline key members for buffer robustness

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:38 +01:00
Joshua Ashton
3e269c7a4e radv: Rename radv_required_subgroup_info to radv_shader_stage_key
Additionally, prefix the members that are subgroup related with subgroup_

We will use this structure to store pipeline robustness information.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:34 +01:00
Joshua Ashton
2c6125c1c5 radv: Split and move buffer robustness to shader key
Will be used by pipeline robustness.

There is also loads of space in the first dword.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:30 +01:00
Joshua Ashton
3e36b47b96 radv: Rename radv_nir_compiler_options::robust_buffer_access to robust_buffer_access_llvm
This is only used by LLVM, make that clearer.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:21 +01:00
Joshua Ashton
f52ebc8b40 radv: Refactor buffer robustness to an enum
Will be taken advantage of with pipeline robustness.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23912>
2023-07-04 21:04:10 +01:00
José Roberto de Souza
59aa49494c anv: Drop unnecessary intel_canonical_address() calls around bo->offset
bo->offset is set as canonical address no need to do it over again.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
2023-07-04 15:24:04 +00:00
José Roberto de Souza
27e20c8726 anv: Drop unnecessary intel_canonical_address() call around anv_address_physical()
anv_address_physical() already returns a canonical address.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
2023-07-04 15:24:04 +00:00
José Roberto de Souza
2fa4fe2c85 anv: Fix some mismatches of canonical and regular addresses around anv_bo_vma_alloc_or_close()
anv_vma_alloc() returns a canonical address, but explicit_address is a
regular address. This mismatch can potentially cause issues.

So here making bo->offset as always canonical address by converting it
in the explicit case and fixing the only caller that was caling
anv_bo_vma_alloc_or_close() with a canonical address.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
2023-07-04 15:24:04 +00:00
Daniel Stone
f948393005 Revert "ci/fdno: Pause a660 testing"
The fastboot/USB/network issue has been resolved.

This reverts commit e207458ad509c6dc670bfdef9e1a3685aa4ee5f4.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23989>
2023-07-04 11:43:54 +00:00
Erico Nunes
a775b9cb64 ci: restore lima farm
The ISP network issues are now resolved.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Acked-by: Vasily Khoruzhick <anarsoul@gmail.com>
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23951>
2023-07-04 11:27:45 +00:00
Alejandro Piñeiro
bbdb615a86 v3dv/device: update conformanceVersion
The Vulkan CTS started generating the list of valid versions the
driver can report as conformant against based on the active branches,
and the branch we were reporting up to now is no longer valid.

Fixes dEQP-VK.api.driver_properties.conformance_version

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23980>
2023-07-04 11:09:55 +00:00
Yonggang Luo
8f8ea2dd68 broadcom: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23988>
2023-07-04 10:47:26 +00:00
Yonggang Luo
edb607ed9f v3d: Switch to use nir_foreach_function_impl
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23988>
2023-07-04 10:47:26 +00:00
Yonggang Luo
9cfded7f1b vc4: Convert to use nir_foreach_function_impl when possible
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23988>
2023-07-04 10:47:26 +00:00
Marcin Ślusarz
7ed9ec70c0 intel/compiler: simplify reading of gl_NumWorkGroups in task/mesh
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
1ac1d5d62e anv,intel/compiler: enable shortcut in wg id to wg idx lowering on >= gfx12.5
This speeds up vk_meshlet_cadscene in "VK mesh ext" renderer by 1.4%

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
3d7513ee8e nir: add cheap shortcut for wg id to wg idx lowering
... for platforms where integer division is expensive

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00
Marcin Ślusarz
7ec1ef75d3 intel/compiler: pass num_workgroups from task to mesh shaders
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22334>
2023-07-04 09:15:08 +00:00