Commit graph

176897 commits

Author SHA1 Message Date
Sagar Ghuge
839b03cc06 blorp: Drop unnecessary assertions in blorp_can_hiz_clear_depth
We already checks for the alignment and the multislice surface, we don't
need to add assertions around those two.

fixes: 37fcbb375c ("blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too")
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9684

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24837>
2023-08-23 00:35:07 +00:00
Rob Clark
39f26642d6 util: Decouple disk cache from EGL_ANDROID_blob_cache
Just because the user / system-integrater doesn't want shader disk
cache, doesn't mean they don't want EGL_ANDROID_blob_cache to work.
We've kind of already solved this for the android case, so just
generalize that solution.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9520
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24636>
2023-08-23 00:04:16 +00:00
Emma Anholt
5bd0750921 intel/fs: Simplify compute_start_end().
Now that we have moved the screening up, we can simplify the code.  No
change in shader-db steam performance, n=10.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
2023-08-22 23:34:30 +00:00
Emma Anholt
2b01246f49 intel/fs: Move the defin[]/defout[] screening up to livein[]/liveout[] setup.
This keeps us from having to run the loop to propagate up quite so much.

steam shader-db time -1.86356% +/- 0.941498% (n=10).  There's a small
scheduling effect, since previously the scheduler wasn't considering
defin/defout:

cycles helped:   shaders/closed/steam/amnesia-the-dark-descent/high/241.shader_test FS SIMD16: 11428 -> 11422 (-0.05%) (scheduled: scheduled)
cycles helped:   shaders/humus-volumetricfogging2/1.shader_test FS SIMD32: 13832 -> 13800 (-0.23%) (scheduled: scheduled)
cycles helped:   shaders/tesseract/479.shader_test FS SIMD32:      9330 -> 8644 (-7.35%) (scheduled: scheduled)

cycles HURT:   shaders/robclark-shaders/android/angle/aztec_ruins/36.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/57.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/54.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/android/angle/aztec_ruins/30.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/51.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/48.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_4_off/129.shader_test TCS SIMD8: 3911 -> 3979 (1.74%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_4_off/109.shader_test TCS SIMD8: 3911 -> 3979 (1.74%) (scheduled: scheduled)

total cycles in shared programs: 313096438 -> 313096306 (<.01%)
cycles in affected programs: 92200 -> 92068 (-0.14%)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
2023-08-22 23:34:30 +00:00
Emma Anholt
ed4e1becea intel/fs: Move defin/defout setup to the start of the loop.
Refactor for the next commit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
2023-08-22 23:34:30 +00:00
Daniel Schürmann
7e246f7f2b nir/opt_move: fix handling of if-condition
By accident, this used the parent of the nir_src which is a nir_if
instead of the parent of the SSA value.

Totals from 10814 (8.10% of 133461) affected shaders: (GFX11)
Instrs: 21759185 -> 21757190 (-0.01%); split: -0.02%, +0.01%
CodeSize: 112320272 -> 112316008 (-0.00%); split: -0.02%, +0.01%
SpillSGPRs: 11220 -> 11212 (-0.07%)
SpillVGPRs: 911 -> 903 (-0.88%); split: -1.54%, +0.66%
Latency: 258334759 -> 258316073 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 31428650 -> 31426394 (-0.01%); split: -0.02%, +0.01%
VClause: 309119 -> 309090 (-0.01%); split: -0.01%, +0.01%
SClause: 657028 -> 657150 (+0.02%); split: -0.03%, +0.04%
Copies: 1434209 -> 1432420 (-0.12%); split: -0.28%, +0.15%
Branches: 481804 -> 481801 (-0.00%)
PreSGPRs: 829995 -> 829966 (-0.00%)
PreVGPRs: 758249 -> 758253 (+0.00%)

Fixes: 8a78706643 ('nir: refactor nir_opt_move')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24695>
2023-08-22 21:05:18 +00:00
Alyssa Rosenzweig
f9e5534182 nir/lower_gs_intrinsics: Remove end primitive for points
EndPrimitive() for points is entirely pointless, so just remove it when lowering
EndPrimitive to simplify the IR. This is (maybe) an optimization everywhere, and
will be relied on for correctness on Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
2023-08-22 20:24:40 +00:00
Alyssa Rosenzweig
8c7629524e nir/print: Print access qualifiers for intrinsics
Instead of printing an opaque integer that needs to be manually decoded.
Example output:

    32x4   %7 = @image_load (%4 (0x0), %6, %5 (0x0), %4 (0x0)) (image_dim=2D, image_array=false, format=r8g8b8a8_snorm, access=readonly|reorderable, range_base=0, dest_type=float32)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
2023-08-22 20:24:40 +00:00
Caio Oliveira
48b86a877f compiler/types: Use smaller keys for explicit_matrix_types table
Instead of using the name as key, use a shorter struct type.
Only build a name string if we are adding a new entry to the table.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
2023-08-22 18:52:15 +00:00
Caio Oliveira
fd1da0f7f5 compiler/types: Extract get_explicit_matrix_instance() function
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
2023-08-22 18:52:15 +00:00
Caio Oliveira
b248740e30 compiler/types: Use smaller keys for array_types table
Instead of building a string, build a short struct type and use
that as key.  The only caveat here is ensure there either there's
no internal padding or the internal padding is always the same.
Use a static assert to ensure we are in the former case.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
2023-08-22 18:52:15 +00:00
Caio Oliveira
d4fcc97a3f compiler/types: Use ralloc for the key in array_types
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
2023-08-22 18:52:15 +00:00
Eric Engestrom
566c919df8 ci/deqp: backport fix for dEQP-EGL.functional.wide_color.*_888_colorspace_*
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24808>
2023-08-22 18:12:08 +00:00
norablackcat
f744c114d1 rusticl: add cl_khr_expect_assume
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Tested-by: Andrey Alekseenko <al42and@gmail.com>
Tested-by: Yifeng Li <tomli@tomli.me>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23115>
2023-08-22 17:28:05 +00:00
norablackcat
25bc3d2824 spirv/nir_to_spirv: add expect assume op codes
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23115>
2023-08-22 17:28:05 +00:00
Emma Anholt
37fcbb375c blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too.
Fixes MSAA scissored fast clears under zink and ANGLE.

Fixes: e488773b29 ("anv: Fast clear depth/stencil surface in vkCmdClearAttachments")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24225>
2023-08-22 16:34:52 +00:00
Konstantin Seurer
7aee3ba36d radv: Stop updating the stack_size in insert_rt_case
There are two paths that call insert_rt_case:
- Traversal shader: The stack size is ignored.
- Monolithic raygen shader: The stack sizes of the inlined shaders are
                            accounted for in compute_rt_stack_size.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer
bdec044c88 aco: Do not fixup registers if there are no shader calls
Frees up some registers when using monolithic compilation.

Quake II RTX and Control (with monolithic compilation):

Totals from 10 (29.41% of 34) affected shaders:
MaxWaves: 77 -> 98 (+27.27%)
Instrs: 49047 -> 48984 (-0.13%); split: -0.16%, +0.03%
CodeSize: 260420 -> 259880 (-0.21%); split: -0.25%, +0.04%
VGPRs: 1328 -> 1104 (-16.87%)
Latency: 477134 -> 479377 (+0.47%); split: -0.05%, +0.52%
InvThroughput: 137763 -> 114108 (-17.17%)
VClause: 1318 -> 1286 (-2.43%); split: -2.66%, +0.23%
SClause: 1295 -> 1293 (-0.15%); split: -0.54%, +0.39%
Copies: 7838 -> 7782 (-0.71%); split: -0.82%, +0.10%
Branches: 2592 -> 2589 (-0.12%)
PreSGPRs: 874 -> 796 (-8.92%)
PreVGPRs: 1283 -> 1013 (-21.04%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer
ec708c26ef radv/rt: Split stage initialization and hashing
The dependency chain is: init stages -> compute pipeline key -> hash
stages.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer
f3e2900c59 radv/rt: Insert rt_return_amd before lowering shader calls
Also skips running nir_lower_shader_calls for the traversal shader. This
will be used to skip the pass and the rt_return_amd insertion for
monolithic raygen shaders.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer
774421f11e radv/rt: Add and use radv_build_traversal
Moves most of the build code to a helper which will be useful for adding
inline traversal.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer
2d7965dbff radv/rt: Do not apply stack_ptr for non-recursive stages
stack_ptr is set to 0.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
Konstantin Seurer
d174a71db8 radv/rt: Remove some dead code
- call_idx_base was used for resume shaders in the shader call loop
- hit attribs are lowered elsewhere
- stack_size is set in radv_pipeline_rt.c

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24809>
2023-08-22 15:46:29 +00:00
M Henning
10bbe17253 nv/codegen: Remove Function::buildDefSets
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
bf48f7ca97 nv/codegen: Delete periodicMask32
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
eae6800ec3 nv/codegen: Delete unused OP_CONSTRAINT
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
dcec14c51e nv50_ir_ra: Delete unused functions
Wrap the file in an anonymous namespace and delete any code that
gcc warns is unused.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
21a3889d9b nv/codegen: Remove unused clipVertexOutput var
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
95c20be563 nv/codegen: Merge from_common into from_nir
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
b80897fab1 nv/codegen: Remove fragCoord variable.
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
2ef8af39d8 nv/codegen: Delete OP_EXP, OP_LOG
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
401bdd7d1e nv/codegen: Delete OP_WRSV
It's never generated by anything.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:24 -04:00
M Henning
f4ba2fdd73 nv/codegen: Fix an uninitialized variable warning
The warning was actually a false positibe, but CI failed with:
error: 'nvirOp' may be used uninitialized [-Werror=maybe-uninitialized]

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24791>
2023-08-22 10:42:16 -04:00
Friedrich Vock
a28ff7f240 nir/load_store_vectorize: Handle intrinsics with constant base
This includes nir_load_stack and nir_store_stack, which are vectorized
in nir_lower_shader_calls. If not adjusted, we end up loading from
the wrong base.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9596
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9587
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24789>
2023-08-22 13:26:12 +00:00
Tapani Pälli
db05db44fe iris: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:

 3DSTATE_HIER_DEPTH_BUFFER
 3DSTATE_STENCIL_BUFFER
 3DSTATE_DEPTH_BUFFER
 3DSTATE_CPSIZE_CONTROL_BUFFER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
2023-08-22 12:49:37 +00:00
Tapani Pälli
c9abcddad4 anv: implement a dummy depth flush for Wa_14016712196
Emit depth flush after state that sends implicit depth flush. These
states are:

 3DSTATE_HIER_DEPTH_BUFFER
 3DSTATE_STENCIL_BUFFER
 3DSTATE_DEPTH_BUFFER
 3DSTATE_CPSIZE_CONTROL_BUFFER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24689>
2023-08-22 12:49:37 +00:00
Georg Lehmann
9cf6984200 nir: unify lower_find_msb with has_{find_msb_rev,uclz}
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22 12:08:37 +00:00
Georg Lehmann
2ac7e6614a nir: unify lower_bitfield_extract with has_bfe
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22 12:08:37 +00:00
Georg Lehmann
34c3f81614 nir: unify lower_bitfield_insert with has_{bfm,bfi,bitfield_select}
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24662>
2023-08-22 12:08:37 +00:00
Friedrich Vock
bfb55d0266 ac/sqtt,radv/sqtt: Add and use marker for separate RT compilation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
3d3d5c4bc3 radv/sqtt: Handle separately-compiled RT pipelines
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
1cd9525b18 radv/sqtt: Write LDS size metadata in code objects
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
7809fb9e49 radv/sqtt: Unregister records based on hash
RT pipelines have multiple hashes used in records, so don't always use
the pipeline hash.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
3ed4cca883 radv/sqtt: Move record filling to helper function
RT shaders construct records differently, but this piece of code is
common to all types of pipelines.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
b4a704b42a ac/rgp: Add metadata for separate-compiled RT stages
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
0c4e92bf3e ac/rgp: Write lds_size metadata
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
be0e3e8e09 ac/sqtt,radv: Split internal and API hash in PSO correlations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:11 +00:00
Friedrich Vock
d5f1c9fb4b ac/msgpack: make fixstrs a const char
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24371>
2023-08-22 11:33:10 +00:00
Marek Vasut
ef4cb2431d etnaviv: Fully replicate back stencil config
The blob replicates both the value mask as well as the stencil reference
of the back-facing stencil to the front-facing stencil. This fixes the
remaining failures in the following dEQPs:

   dEQP-GLES2.functional.fbo.render.*_stencil_index8

Fixes: c8ccd63911 ("etnaviv: Fix depth stencil ops on GC880/GC2000")
Signed-off-by: Marek Vasut <marex@denx.de>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4867>
2023-08-22 12:00:27 +02:00
José Roberto de Souza
a425ae17ac anv: Update Wa_16014390852 for MTL
On MTL Wa_16014390852 is fixed on B0 stepping so we can't use a macro
check anymore for this workaround.

cc: mesa-stable

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24812>
2023-08-22 06:33:56 +00:00