Commit graph

115290 commits

Author SHA1 Message Date
Mike Blumenkrantz
828c767113 zink: rework input/output location emission
glsl builtins that have no analog in spirv are emitted as regular varyings,
which means they take up a slot.

we need to ensure that there's no conflict between these regular varying
slots (from user-defined varyings) and the glsl translated builtins, so
we do that by "reserving" the max number of varying slots that can be used
by a given stage, then remapping all glsl builtins with no spirv builtin
to a packed layout location that can be consistent across stages

sort of addresses mesa/mesa#3113 except now there's 10 fewer varying slots

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5432>
2020-06-15 15:36:06 +00:00
Mike Blumenkrantz
f90bc6daa9 zink: handle more glsl->spirv builtin translation
this should be all of them, though the check for vertex shader stage needs
to be changed to !fragment stage at some point

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5432>
2020-06-15 15:36:06 +00:00
Samuel Pitoiset
9b6a8d1742 spirv: fix using OpSampledImage with OpUndef instead of OpType{Image,Sampler}
This seems valid per the SPIR-V spec to use OpSampledImage with
OpUndef instead of OpTypeImage or OpTypeSampler. When the image
operand is undefined, SPIRV->NIR emits an undef instruction that
can be removed later by the compiler.

This fixes shader compilation crashes with Red Dead Redemption II.

Cc: mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5230>
2020-06-15 17:02:53 +02:00
Alyssa Rosenzweig
277b616962 pan/mdg: Precolour blend inputs
Instead of requiring an explicit unoptimized move, we can implicitly
colour the blend input intrinsic to r0, where it will be preloaded; this
is a simple task for RA, and does not conflict with anything. If there
are multiple duplicate loads, the latter ones can just be simple moves
which will be copypropped.

We don't need to include a explicit synthetic load, since (scanning
backwards) the read will cause the input to become live at the right
time and the lack of an explicit write will keep it live from the
beginning of the shader. So no need to make it more complicated than it
needs to be.

Saves a cycle in blend shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5449>
2020-06-15 13:29:25 +00:00
Yevhenii Kolesnikov
ad00159070 nvir: don't use designated initialisers in C++ code
This feature only available since C++20.

Fixes: fa0a241b33 ("nvir/nir: move nir options to codegen")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3114

Signed-off-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5430>
2020-06-15 13:29:23 +03:00
Samuel Pitoiset
013d096d15 ac: add ac_choose_spi_color_formats() to common code
It's similar between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5436>
2020-06-15 08:16:07 +02:00
Jonathan Marek
1d9e6e456a freedreno/ir3: fix ir3_nir_move_varying_inputs
ir3_nir_move_varying_inputs is broken when there a load input outside of
the first block which depends on the result of a previous load input.

This simplification/rework avoids the problem, and should also be faster.

Fixes this dEQP-VK test:

dEQP-VK.pipeline.multisample_interpolation.offset_interpolate_at_pixel_center.128_128_1.samples_2

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5465>
2020-06-14 17:53:47 +00:00
Eric Engestrom
356be07ce2 intel/tools: make test aware of the meson test wrapper
Suggested-by: Dylan Baker <dylan@pnwbakers.com>
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5155>
2020-06-13 20:32:08 +00:00
Eric Engestrom
ccaa5b034f intel/tools: rewrite run-test.sh in python
Old script created files in the source directory, which is generally
considered bad form.

The rewrite to python instead of duct-taping around in the shell script
goes towards the goal of only having cross-platform python scripts,
which is also harder to make mistakes in than shell scripts.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5155>
2020-06-13 20:32:08 +00:00
Erik Faye-Lund
cd01d0dee1 radv: update internal reference
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4630>
2020-06-13 10:42:01 +00:00
Eric Engestrom
4de678cd30 iris: drop dead #include "config.h"
There hasn't been a config.h in a long time (it was an artifact of the
autotool build).

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5350>
2020-06-13 01:31:56 +00:00
Eric Engestrom
eeb51c2d36 i965: drop dead #include "config.h"
There hasn't been a config.h in a long time (it was an artifact of the
autotool build).

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5350>
2020-06-13 01:31:56 +00:00
Eric Engestrom
6497d1d304 intel/genxml: replace gen_sort_tags.py MIT licence with SPDX equivalent
Much more readable with the same information :)

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5362>
2020-06-13 01:16:17 +00:00
Eric Engestrom
ff0f1c6a27 intel/genxml: drop python 2 support for gen_sort_tags.py
Python 2 is dead and this script is only run by devs, all of which have
had python3 available for basically forever.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5362>
2020-06-13 01:16:17 +00:00
Eric Engestrom
6456f71f76 v3d: add missing unlock() in error path
CoverityID: 1435701
Fixes: e5a81ac704 ("broadcom/vc5: Don't forget to get the BO offset when opening a dmabuf.")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5263>
2020-06-13 00:45:47 +00:00
Jonathan Marek
8c152a5e2a turnip: remove some dead/redundant code
A bit of cleanup to reduce noise in the codebase.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5447>
2020-06-13 00:11:47 +00:00
Icecream95
7ef648c0f3 panfrost: Tiled to linear layout conversion
Tiling is expensive, so this patch converts textures that appear to be
used for streaming to a linear layout.

Performance of mpv is significantly improved, with software-decoded
1080p mp4 playback on RK3288 going from 30fps to 50fps when testing
with `--untimed --no-audio`.

To keep things simple, conversion only happens when updating the whole
texture and no mipmapping is used.

v2: Make it clear that the heuristic doesn't rely on a texture being
uninitialized, since layout switching code can get confusing (Alyssa).

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
2020-06-12 19:15:47 +00:00
Icecream95
fafc305600 panfrost: Create a new sampler view bo when the layout changes
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
2020-06-12 19:15:46 +00:00
Icecream95
3baf10adb9 panfrost: Move sampler view bo creation to a separate function
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4628>
2020-06-12 19:15:46 +00:00
Matt Turner
66111bc95a intel/compiler: Drop opt_sampler_eot()
Gen9 and Cherryview have the ability to mark texture instructions with
the End-of-thread bit under some conditions, which allows the texture
result to be written to the render target directly, rather than
returning to the EU.

In order to handle overlapping primitives correctly, we have to use the
'sendc' instruction which stalls until other threads potentially writing
to the same locations in the render target are retired. Unfortunately,
this stall happens before the texture is sampled (rather than in
parallel with stall), so for some literal edge cases (like the diagonal
edge between two triangles forming a rectangle) there can be a
performance penalty. As a result, it's probably not a good idea to use
this optimization in general.

I had planned to leave it enabled only for BLORP, where we use rectangle
primitives and are typically clearing/blitting an entire render target
without any overlapping primitives, but I noticed that the optimization
wasn't applied in some normal cases anyway. For example, in the piglit
test tests/shaders/glsl-fs-texture2d-bias.shader_test it is applied to
one BLORP-blit shader but not another due to some kind of mishandling of
register types (the destination register type of the texture operation
is UD while the color source of the render target write is F).

Additionally the instruction scheduler assumed that the combined texture
and render target write operation took 0 cycles, leading to cycle
estimates that are wildly inaccurate. Since the optimization was not
implemented for SIMD32 and our decision whether to use the SIMD32
program is made by comparing the estimated performance with that of the
SIMD16 shader, we wrongly threw out a bunch of SIMD32 programs that are
likely profitable.

   total cycles in shared programs: 472807891 -> 473784245 (0.21%)
   cycles in affected programs: 108277 -> 1084631 (901.72%)
   helped: 0
   HURT: 1290

   total sends in shared programs: 998955 -> 1000245 (0.13%)
   sends in affected programs: 1400 -> 2690 (92.14%)
   helped: 0
   HURT: 1290

   LOST:   0
   GAINED: 33

This patch shows no performance changes in Intel's Mesa performance CI.

Given the problems, the lack of evidence that the pass improves
performance, and the fact that the hardware feature was removed from
subsequent GPU generations, I think that the pass is not valuable and
should be removed.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5412>
2020-06-12 19:01:26 +00:00
Alyssa Rosenzweig
7ae2110e61 pan/mdg: Prefer type over regmode for schedule constraints
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
2020-06-12 12:57:11 -04:00
Alyssa Rosenzweig
5cf5d3cc2d pan/mdg: Analyze types for 64-bitness in RA
Instead of reg_mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
2020-06-12 12:57:11 -04:00
Alyssa Rosenzweig
5e5ea25a0d pan/mdg: Explicitly type 64-bit uniform moves
Instead of relying on reg_mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
2020-06-12 12:57:11 -04:00
Jonathan Marek
c93753e618 turnip: add emit renderpass cache flushes for sysmem 3D CmdClearAttachments
This clear path behaves like a draw, it needs the same flush as tu_draw.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:07 +00:00
Jonathan Marek
72d7df40a5 turnip: add layered 3D path clear for CmdClearAttachments
This fixes cases where the 3D path is used with layered rendering.

Fixes dEQP-VK.renderpass.suballocation.multisample_resolve.layers* failures

Note the blob's 3D fallback path behaves differently, and uses the
framebuffer information to clear each layer individually (changing the MRT
state each time). But that's not possible in all cases, and the blob fails
to clear properly in dEQP-VK.geometry.layered.*.secondary_cmd_buffer cases.
So this clear path is not based on the blob's behavior.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:07 +00:00
Jonathan Marek
093c413722 turnip: share code between 3D blit/clear path and tu_pipeline
Instead of filling out registers manually, fill out ir3 structs and re-use
code from tu_pipeline.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:06 +00:00
Jonathan Marek
13525a9c70 turnip: pipeline program state refactor
This refactor simplifies things a bit, and will make it easier to share
some logic with tu_clear_blit (see next patches).

This changes the order in which some things are emitted, and emits less
for disabled shader stages. There's also as extra write to SP_GS_PRIM_SIZE
that is removed.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
2020-06-12 15:09:06 +00:00
Alyssa Rosenzweig
1c1782c6b5 panfrost: Demote mediump varyings to fp16
Likewise lowp.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
a7f524674b panfrost: Override varying format to minimal precision
Spec allows this!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
f1de952b69 panfrost: Use shader_info harder
We already have this metadata..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
3cc425e27d panfrost: Only store varying formats
This reduces linking complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
8462ca076d panfrost: Allow R/RG/RGB varyings
This can be a bandwidth savings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
a0578998a4 panfrost: Remove unused routines
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
79e349abca panfrost: Use new varying linking
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
6ab87c55bc panfrost: Add high-level varying emit
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
e9e9b2b39b panfrost: Add helper to determine if we are capturing
That is, is the varying setup for xfb *and* is there a buffer for it?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
c31af6fbca panfrost: Emit xfb records
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
df24209473 panfrost: Emit special varyings
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
0c0217d945 panfrost: Emit unlinked varyings
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
3d04ebf7f8 panfrost: Determine varying buffer presence
Essentially the same logic as before, but the assumptions are much more
explicit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
258b80b6eb panfrost: Introduce bitfields for tracking varyings
Rather than having all sorts of random state flyng about with varying
emission, we can use a simple present mask and general stride to encode
everything we need for non-XFB cases, and layer XFB on top easily
enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
e26ac2e165 panfrost: Add panfrost_streamout_offset helper
Calculates the bias required for an xfb record in the src_offset field
to account for truncating the address to force alignment.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
24c3b95925 panfrost: Calculate varying size by format
Will enable <16-byte varyings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
7ac1bb047a pan/mdg: Avoid fusing ld_vary_16 with non-zero component
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
2020-06-12 14:45:50 +00:00
Daniel Schürmann
1f98d8c804 aco: fix shared subdword loads
Shared subdword loads don't need byte alignment as they are split
into multiple loads if necessary.

Fixes: 5cde4989d3 ('aco: remove unnecessary split- and create_vector instructions for subdword loads')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5441>
2020-06-12 13:56:12 +00:00
Samuel Pitoiset
e7e9969efe radv: enable radv_enable_mrt_output_nan_fixup for RAGE 2
To fix game artifacts. It's always sad to have to fix game bugs
inside drivers ...

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:58 +02:00
Samuel Pitoiset
54e7ae569b radv/llvm: implement radv_enable_mrt_output_nan_fixup workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:58 +02:00
Samuel Pitoiset
7b44f549b3 aco: implement radv_enable_mrt_output_nan_fixup workaround
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:57 +02:00
Samuel Pitoiset
6f21995f98 radv: add new drirc option radv_enable_mrt_output_nan_fixup
To replace NaN from FS with zeros to fix game bugs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
2020-06-12 14:43:31 +02:00
Timothy Arceri
b33f811068 glsl: fix incorrect optimisation in opt_constant_variable()
When handling function inputs the optimisation pass incorrectly
assumes the inputs are undefined. Here we simply change things to
assume inputs have always been assigned a value. Any further
optimisations will be taken care of once function inlining takes
place.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2984
Fixes: 65122e9e80 ("ir_constant_variable: New pass to mark constant-assigned variables constant.")

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5413>
2020-06-12 08:51:54 +00:00