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18 commits

Author SHA1 Message Date
Marek Olšák
d3b03fedd8 amd: add initial code for gfx940 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22158>
 2023-04-06 15:00:53 +00:00
Marek Olšák
be8c61b4f6 amd/registers: only define SPI and COMPUTE registers in the 0xB000 range 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
e0c8b24e22 amd/registers: unify VRS combiner definition names between gfx103 and gfx11 
use gfx11 names

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
63b21e3066 amd: add missing gfx11 register definitions 
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
b6f6465264 amd: update SX_BLEND_OPT_EPSILON.MRT0_EPSILON enum definitions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21041>
 2023-02-03 00:18:01 +00:00
Marek Olšák
b361ecc0da amd/registers: describe allowed register ranges better 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19419>
 2022-11-04 00:42:08 +00:00
Marek Olšák
ff4cd2133d amd/registers: fix parse_kernel_headers.py warnings by adding missing enums 
Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19419>
 2022-11-04 00:42:07 +00:00
Marek Olšák
9e9cc62912 radeonsi: follow shader_info.float_controls_execution_mode (mostly) 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level" 
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
 2022-05-13 14:56:22 -04:00
Marek Olšák
f75525fba3 amd/registers: add gfx11 to the json generator 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
3a2f7efe5e amd/registers: hardcode GC base offsets in the json generator 
gfx11 doesn't have the ip_offset file, so we have to do it this way.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
95af3cc2f8 amd: remove the _UMD suffix from register definitions 
It was mistakenly added to indicate it's for a User-Mode Driver,
but all defined registers in Mesa are.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15098>
 2022-02-22 11:41:04 +00:00
Marek Olšák
bb017d5d16 amd/registers: work around an assertion in parse_kernel_headers.py 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
 2022-01-05 12:46:30 +00:00
Marek Olšák
72362f2830 amd/registers: don't generate 32-bit register fields 
This removes confusing register types due to deduplication, such as:
   "name": "SQ_WAVE_TTMP10",
   "type_ref": "SPI_SHADER_USER_DATA_PS_0"

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
 2021-05-25 16:15:43 +00:00
Marek Olšák
3e0ce4af4f amd/registers: clean up gfx103.json 
because gfx103.json is automatically generated and can't be changed
manually. This fixes the file generator without changing the generated
header.

Missing registers must be in registers-manually-defined.json, and
missing fields must be in parse_kernel_headers.py.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10261>
 2021-04-17 02:37:49 +00:00
Marek Olšák
a142925b7a amd/registers: fix the kernel header parser with latest headers 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10261>
 2021-04-17 02:37:49 +00:00
Marek Olšák
c13370e816 amd: add register enums for VRS 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7646>
 2020-11-17 22:16:19 +00:00
Marek Olšák
48a7a24a69 amd/registers: add a script that generates json from kernel headers 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
 2020-09-01 08:45:48 -04:00