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amd/registers: don't generate 32-bit register fields

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This removes confusing register types due to deduplication, such as:
   "name": "SQ_WAVE_TTMP10",
   "type_ref": "SPI_SHADER_USER_DATA_PS_0"

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10813>
This commit is contained in:
Marek Olšák 2021-05-07 03:57:36 -04:00 • committed by Marge Bot
parent 287c06228c
commit 72362f2830
1 changed files with 6 additions and 1 deletions
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7
src/amd/registers/parse_kernel_headers.py
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@ -804,7 +804,12 @@ def generate_json(gfx_version, amd_headers_path):
if len(type['fields']) > 0:
reg_types[name] = type
reg['type_ref'] = name
# Don't define types that have only one field covering all bits
field0_bits = type['fields'][0]['bits'];
if len(type['fields']) > 1 or field0_bits[0] != 0 or field0_bits[1] != 31:
reg['type_ref'] = name
reg_mappings.append(reg)