Commit graph

8501 commits

Author SHA1 Message Date
Charles Giessen
80a99ae906 radv: Update LoaderICDInterfaceVersion to v5
With the proper version checking in the common vulkan instance code
(commit 88b9b68) it is now possible to bring the reported interface
version up to v5.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14563>
2022-01-20 07:25:07 +00:00
Dave Airlie
1352e0ba0c mesa/*: add a shader primitive type to get away from GL types.
This creates an internal shader_prim enum, I've fixed up most
users to use it instead of GL types.

don't store the enum in shader_info as it changes size, and confuses
other things.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14605>
2022-01-19 21:54:58 +00:00
Dave Airlie
d54c07b4c4 mesa/*: use an internal enum for tessellation primitive types.
To avoid dragging gl.h into places it has no business being,
defined tessellation primitive mode to an enum.

This has a lot of fallout all over the place.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14605>
2022-01-19 21:54:58 +00:00
Dave Airlie
acd0afdba4 amd: move uvd decode definitions to common place
This just makes sharing these easier later.

 Acked-by: Leo Liu <leo.liu@amd.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14607>
2022-01-20 07:07:32 +10:00
Dave Airlie
14551f2bde amd: move vcn decoding regs + structs to a common file.
This just moves the main regs + fw interface structs to a new shared
file.

 Acked-by: Leo Liu <leo.liu@amd.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14607>
2022-01-20 07:07:30 +10:00
Samuel Pitoiset
96cc300746 radv: fix missing destroy for the overallocation mutex
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14611>
2022-01-19 16:47:56 +00:00
Marcin Ślusarz
a4b8f69bb5 radv/ci: add line endings exception for files generated with wine
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11779>
2022-01-19 15:17:17 +00:00
Rhys Perry
b59764a9fc aco: use p_extract for SGPR nir_op_unpack_half_2x16_split_y
fossil-db (Sienna Cichlid):
Totals from 7264 (5.40% of 134627) affected shaders:
VGPRs: 548152 -> 548184 (+0.01%)
SpillSGPRs: 7615 -> 7607 (-0.11%)
CodeSize: 71025152 -> 70993036 (-0.05%); split: -0.05%, +0.00%
Instrs: 13386799 -> 13298580 (-0.66%); split: -0.66%, +0.00%
Latency: 177464497 -> 177091693 (-0.21%); split: -0.21%, +0.00%
InvThroughput: 32185148 -> 32151873 (-0.10%); split: -0.10%, +0.00%
VClause: 233167 -> 233166 (-0.00%); split: -0.00%, +0.00%
SClause: 468423 -> 468426 (+0.00%); split: -0.00%, +0.01%
Copies: 950727 -> 942753 (-0.84%); split: -0.85%, +0.02%
Branches: 455919 -> 455901 (-0.00%); split: -0.01%, +0.00%

fossil-db (Vega):
Totals from 7264 (5.39% of 134762) affected shaders:
SGPRs: 738800 -> 738816 (+0.00%)
VGPRs: 550264 -> 550344 (+0.01%)
SpillSGPRs: 11149 -> 11157 (+0.07%)
CodeSize: 67487104 -> 67466772 (-0.03%); split: -0.03%, +0.00%
Instrs: 13142106 -> 13061767 (-0.61%)
Latency: 209278575 -> 208438854 (-0.40%); split: -0.40%, +0.00%
InvThroughput: 81486405 -> 81265773 (-0.27%); split: -0.27%, +0.00%
VClause: 222293 -> 222291 (-0.00%); split: -0.00%, +0.00%
SClause: 447783 -> 447800 (+0.00%); split: -0.00%, +0.01%
Copies: 1243760 -> 1238842 (-0.40%); split: -0.43%, +0.03%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14592>
2022-01-19 12:41:48 +00:00
Marek Olšák
3cafa3e852 ac/surface: allow displayable DCC with any resolution (e.g. 8K)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14529>
2022-01-18 01:44:17 -05:00
Samuel Pitoiset
88f1918919 radv/winsys: fix zero submit if no timeline semaphore support
Kernels that don't support timeline semaphores also don't support
transferring syncobjs. Use export/import instead.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5845
Fixes: 967fc415fc ("radv: Add new submission path for use by the common sync framework.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14538>
2022-01-17 08:38:29 +01:00
Emma Anholt
f6ffefba3e nir: Apply nir_opt_offsets to nir_intrinsic_load_uniform as well.
Doing this for ir3 required adding a struct for limits of how much base to
fold in (which NTT wants as well for its case of shared vars), otherwise
the later work to lower to the 1<<9 word limit would emit more
instructions.

The shader-db results are that sometimes the reduction in NIR instruction
count results in the fewer sampler prefetches due to the shader being
estimated to be shorter (dota2, nexuiz):

total instructions in shared programs: 8996651 -> 8996776 (<.01%)
total cat5 in shared programs: 86561 -> 86577 (0.02%)

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14023>
2022-01-16 19:11:29 +00:00
Jason Ekstrand
8b3d947267 spirv,radv: Fix some GL enum comments
GL_LINE_STRIP_ADJACENCY is 0xB.  0xA is GL_LINES_ADJACENCY.  While we're
here, drop the ARB prefixes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14157>
2022-01-14 15:08:09 +00:00
Charles Giessen
9d013f2c24 radv: Update description of vk_icdNegotiateLoaderICDInterfaceVersion
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14299>
2022-01-14 10:25:41 +01:00
Samuel Pitoiset
e6173ed1d2 radv: allow to disable anisotropic filtering for single level image with drirc
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14471>
2022-01-13 16:17:48 +00:00
Samuel Pitoiset
49c1b40290 radv: only clear VRS_HTILE_ENCODING on GFX10.3+
On older chips like GFX9, bit 19 is RB_ALIGNED.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5859
Fixes: 9c746157ae ("radv: reset VRS if the current subpass doesn't have a VRS attachment")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14530>
2022-01-13 12:57:39 +00:00
Rhys Perry
cc802cab7c radv: add RADV_DEBUG=splitfma
This splits application-provided FMA in vertex/geometry/tesselation/mesh
shaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14458>
2022-01-12 23:50:35 +00:00
Daniel Schürmann
8a78706643 nir: refactor nir_opt_move
This patch is a rewrite of nir_opt_move.
Differently from the previous version, each instruction is checked
if it can be moved downwards and then inserted before the first user
of the definition. The advantage is that less insert operations are
performed, the original order is kept if two movable instructions have
the same first user, and instructions without user in the same block
are moved towards the end.

v2: Only return true if an instruction really changed the position.
    Don't care for discards, this will be handled by another MR.
v3: fix self-referring phis and update according to nir_can_move_instr().
v4: use nir_can_move_instr() and nir_instr_ssa_def()
v5: deduplicate some code

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3657>
2022-01-12 13:41:54 +00:00
Pierre-Eric Pelloux-Prayer
86262b6eac radeonsi,radv: fix usages of surf_pitch
For linear textures, pitch[level] should be used instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14454>
2022-01-12 11:39:53 +00:00
Samuel Pitoiset
9cd8908c03 radv: fix computing the fb size in presence of dynamic VRS attachment
This fixes
dEQP-VK.fragment_shading_rate.dynamic_rendering.attachment_rate.*.

Fixes: e914a6710f ("radv: Expose the VK_KHR_dynamic_rendering extension.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14421>
2022-01-12 11:16:31 +00:00
Samuel Pitoiset
9c746157ae radv: reset VRS if the current subpass doesn't have a VRS attachment
With a scenario like:
BeginRP(DS + VRS att)
Draw()
EndRP()
BeginRP(same DS)
Draw()
EndRP()

The second draw shouldn't use VRS but it did because the VRS bit
is always set during DS surface initialization if a surface can use VRS.
So, it would have been using the previous copied VRS rates.

Found by inspection.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14443>
2022-01-12 10:22:29 +00:00
Samuel Pitoiset
ec4dcd53db radv: stop checking if dynamic states changed
This is costly for the CPU and might hurt "good" applications that
already avoid that like DXVK/vkd3d-proton.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5009
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12441>
2022-01-12 09:48:29 +00:00
Bas Nieuwenhuizen
38b3661b8f radv: 256 byte push constants.
This helps vkd3d-proton, especially when indirecting more stuff.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14485>
2022-01-12 01:08:39 +00:00
Bas Nieuwenhuizen
43f8e07765 radv: Use 16-bits to store push constant indices.
Otherwise things horrible go wrong when we get 256 bytes of push
constants.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14485>
2022-01-12 01:08:39 +00:00
Bas Nieuwenhuizen
3a36d0b787 radv: Use MAX_PUSH_CONSTANTS_SIZE for saved push constants.
So that it can never again get out of sync.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14485>
2022-01-12 01:08:39 +00:00
Pierre-Eric Pelloux-Prayer
7650e6fc4c radv: implement wsi's private transfer queue using SDMA
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Pierre-Eric Pelloux-Prayer
d6ea60d5a2 radv: allocate the prime buffer as uncached
This is a write only buffer so caches aren't needed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Pierre-Eric Pelloux-Prayer
7b5ab48c40 radv: partial sdma support
SDMA code adapted from https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12763

The only supported use case is image (linear or tiled) -> buffer and only GFX9+ is
supported (for now).

Since RADV_QUEUE_TRANSFER aren't exposed to applications, this cannot be used,
except by the driver.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Pierre-Eric Pelloux-Prayer
148b2d0040 amd: add SDMA_NOP_PAD
And use it in amdgpu_cs.c.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13959>
2022-01-11 12:18:35 +00:00
Daniel Schürmann
4e2b624c10 aco: validate VOP3P opsel correctly
Before RA, subdword operands must use .xx
After RA, opsel can either be .xx or .yy

Cc: mesa-stable
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14472>
2022-01-11 11:41:12 +00:00
Thomas H.P. Andersen
7daba1fe65 replace 0 with NULL for NULL pointers
This updates many places where 0 is used as NULL pointer.

There are a few warnings left when I build the default
configuration but they either relate to code
outside of mesa or where "None" is used instead.

Found with static analysis (smatch)

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12174>
2022-01-10 22:53:32 +00:00
Rhys Perry
60c711833f aco: remove pack_half_2x16(a, 0) optimization
This makes the compiler less predictable and should only have a very small
effect on performance.

fossil-db (Vega):
Totals from 2410 (1.79% of 134756) affected shaders:
CodeSize: 6911568 -> 6942840 (+0.45%)

Fixes Horizon Zero Dawn artifacts.

If a shader has:
   a = pack_half_2x16(a, 0) //rtne
   store(pack_half_2x16(0, b) | a) //rtne
   a = unpack_2x16(a).x
It will become:
   store(pack_half_2x16(a, b)) //rtz
   a = unpack_2x16(pack_half_2x16(a, 0)).x //rtne

So a later shader with "unpack_2x16(load()).x" will use "a" rounded to
zero, while the previous shader will use "a" rounded to the nearest even.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2f125908b3 ("radv,aco: lower_pack_half_2x16")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14475>
2022-01-10 22:19:29 +00:00
Rhys Perry
0f5d90c2a7 ac/nir: fix store_buffer_amd write_masks
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14447>
2022-01-10 19:01:04 +00:00
Danylo Piliaiev
b8d486f298 nir/algebraic: Separate has_dot_4x8 into has_sdot_4x8 and has_udot_4x8
Adreno GPUs has native instruction for unsigned and mixed dot_4x8 but
not signed dot product.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13986>
2022-01-10 13:20:39 +02:00
Rhys Perry
1756930a79 radv: increase maxTaskOutputCount to 65535
This is the minimum required by the spec.

Fixes dEQP-VK.api.info.vulkan1p2_limits_validation.nv_mesh_shader

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14446>
2022-01-07 15:04:11 +00:00
Bas Nieuwenhuizen
85ca7fab29 radv: Add common entrypoint dependency.
To ensure we have the header. The revert likely reintroduced compilation flakiness due
to missing dependencies.

Fixes: a255f6f823 ("radv: do not use the common entrypoint for the Metro Exodus layer")
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14430>
2022-01-07 02:21:36 +00:00
Bas Nieuwenhuizen
63101914f8 radv: Set optimal copy alignment to 1.
I think we set it to 128 for no reason at all. The app is still
required to align to the texel size.

Note that we prefer 4 bytes for non-formatted buffer->buffer copy,
but that isn't in scope for these properties according to the
Vulkan spec.

It also happens to help hide what looks like an application bug at
this point with Baldurs Gate 3.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5509
Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14415>
2022-01-07 01:59:13 +00:00
Mike Blumenkrantz
05a5e5a2bc radv: fix xfb query copy param ordering
Fixes: afff9dd0f0 ("radv: Use correct buffer size for query pool result copies.")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14422>
2022-01-06 17:44:09 +00:00
Samuel Pitoiset
f43b0d5cdc radv/winsys: remove unused syncobj functions
The vulkan common runtime code uses the drm functions directly.

Fixes: 91fe0b5629 ("radv: Delete lots of sync code.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14375>
2022-01-06 09:13:50 +00:00
Samuel Pitoiset
da0c708d79 radv: remove remaining dead code related to the old sync code
Fixes: 91fe0b5629 ("radv: Delete lots of sync code.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14375>
2022-01-06 09:13:50 +00:00
Samuel Pitoiset
a255f6f823 radv: do not use the common entrypoint for the Metro Exodus layer
This is incorrect, it will calls the function recursively.

It seems there is random build failures with common runtime code
and MSVC but that's a different issue.

Closes: #5815
Fixes: 46c59e8fd6 ("radv: Remove dependencies on vk_common entrypoints.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14374>
2022-01-05 19:22:50 +00:00
Jason Ekstrand
b2073f5e5d radv: Move QueueSignalReleaseImageANDROID to common code
This is mostly a copy+paste job but with a few syntax changes to make it
follow more closely with other common Vulkan code.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14372>
2022-01-05 16:36:10 +00:00
Jason Ekstrand
dfb1e1777c anv,radv,v3dv: Move AcquireImageANDROID to common code
All three implementations are identical.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14372>
2022-01-05 16:36:10 +00:00
Marek Olšák
3c471c0eb5 ac/nir: move ac_are_tessfactors_def_in_all_invocs into radeonsi
radv isn't going to use it because it's for the TCS epilog

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:31 +00:00
Marek Olšák
116a05c721 ac: move ac_exp_param.h to ac_nir.h
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:31 +00:00
Marek Olšák
2c4926dfc8 radeonsi: use nir->scratch_size instead of ac_count_scratch_private_memory
It's the same.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:31 +00:00
Marek Olšák
12b942bd16 radeonsi: pass sample_coverage VGPR index to the PS prolog instead of guessing
The code was correct, but little confusing. This is cleaner.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:30 +00:00
Marek Olšák
fd14e0afb1 radeonsi: set done=1 for PS exports at the end of si_llvm_build_ps_epilog
so that we can reorder the exports

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:30 +00:00
Marek Olšák
d382ceea2b ac/llvm: remove the num_channels parameter from ac_build_buffer_store_dword
It was used when LLVM didn't support vec3 and we had to pass vec4
with num_channels=3. We no longer need to do that.

This also removes the vec3 splitting or conversion to vec4 in callers.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:30 +00:00
Marek Olšák
e6aac44051 ac/llvm: add vindex into ac_build_buffer_store_dword
for future work

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:30 +00:00
Marek Olšák
bb017d5d16 amd/registers: work around an assertion in parse_kernel_headers.py
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14266>
2022-01-05 12:46:30 +00:00