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amd: move vcn decoding regs + structs to a common file.

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This just moves the main regs + fw interface structs to a new shared
file.

 Acked-by: Leo Liu <leo.liu@amd.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14607>
This commit is contained in:
Dave Airlie 2021-11-05 13:52:57 +10:00
parent a35c5540e4
commit 14551f2bde
3 changed files with 1090 additions and 1055 deletions
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1089
src/amd/common/ac_vcn_dec.h Normal file
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16
src/gallium/drivers/radeon/radeon_vcn_dec.c
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@ -45,22 +45,6 @@
#define FB_BUFFER_SIZE 2048
#define IT_SCALING_TABLE_SIZE 992
#define VP9_PROBS_TABLE_SIZE (RDECODE_VP9_PROBS_DATA_SIZE + 256)
#define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024)
#define RDECODE_VCN1_GPCOM_VCPU_CMD 0x2070c
#define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710
#define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714
#define RDECODE_VCN1_ENGINE_CNTL 0x20718
#define RDECODE_VCN2_GPCOM_VCPU_CMD (0x503 << 2)
#define RDECODE_VCN2_GPCOM_VCPU_DATA0 (0x504 << 2)
#define RDECODE_VCN2_GPCOM_VCPU_DATA1 (0x505 << 2)
#define RDECODE_VCN2_ENGINE_CNTL (0x506 << 2)
#define RDECODE_VCN2_5_GPCOM_VCPU_CMD 0x3c
#define RDECODE_VCN2_5_GPCOM_VCPU_DATA0 0x40
#define RDECODE_VCN2_5_GPCOM_VCPU_DATA1 0x44
#define RDECODE_VCN2_5_ENGINE_CNTL 0x9b4
#define NUM_MPEG2_REFS 6
#define NUM_H264_REFS 17

1040
src/gallium/drivers/radeon/radeon_vcn_dec.h
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