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Author SHA1 Message Date
Georg Lehmann
7de352e99e nir,radv: add an option to not move 8/16bit vecs 
ACO will overestimate the register demand of the sources, so we don't
want to create the vector later.

Foz-DB Navi48:
Totals from 240 (0.30% of 80265) affected shaders:
MaxWaves: 6429 -> 6435 (+0.09%)
Instrs: 3406069 -> 3406646 (+0.02%); split: -0.01%, +0.03%
CodeSize: 18231596 -> 18233288 (+0.01%); split: -0.01%, +0.02%
VGPRs: 14768 -> 14732 (-0.24%)
Latency: 18981274 -> 18979170 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 4247331 -> 4246634 (-0.02%); split: -0.02%, +0.01%
VClause: 85453 -> 85458 (+0.01%); split: -0.01%, +0.01%
Copies: 262046 -> 261971 (-0.03%); split: -0.06%, +0.03%
PreVGPRs: 10899 -> 10775 (-1.14%)
VALU: 1923441 -> 1923485 (+0.00%); split: -0.01%, +0.01%
SALU: 457983 -> 457982 (-0.00%)
VOPD: 4980 -> 4861 (-2.39%); split: +0.48%, -2.87%

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35729>
 2025-06-26 09:29:43 +00:00
Pierre-Eric Pelloux-Prayer
ca0ed07588 ac/pm4: determine spi_shader_pgm_lo_reg when PKT3_SET_SH_REG_PAIRS is used 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35582>
 2025-06-26 07:06:51 +00:00
Samuel Pitoiset
30ccd97cd2 radv: gather nir shader info at the end of radv_optimize_nir() 
Otherwise, outputs_read/outputs_written might not be up-to-date
(mostly after nir_remove_dead_variables) and remove_point_size() might
reach an assertion later because the output variable isn't found.

It seems better to run nir_shader_gather_info() at the very end of
radv_optimize_nir() which can change a lot of things anyways.

No fossils-db changes.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35707>
 2025-06-26 06:11:54 +00:00
Samuel Pitoiset
e91029c82d aco: consider that nir_tex_src_{coord,ddx} can be the first source 
Only -1 means it's not found, but 0 is still valid.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35736>
 2025-06-25 17:20:02 +00:00
Georg Lehmann
01d20680e2 aco/optimizer: generalize p_create_vector of split vector opt 
Foz-DB Navi48:
Totals from 116 (0.14% of 80251) affected shaders:
MaxWaves: 2965 -> 2972 (+0.24%)
Instrs: 145933 -> 144632 (-0.89%); split: -0.91%, +0.02%
CodeSize: 815968 -> 806512 (-1.16%); split: -1.20%, +0.04%
VGPRs: 7240 -> 7144 (-1.33%); split: -1.66%, +0.33%
Latency: 3065858 -> 3063802 (-0.07%); split: -0.11%, +0.05%
InvThroughput: 745395 -> 743506 (-0.25%); split: -0.26%, +0.01%
VClause: 3702 -> 3694 (-0.22%); split: -0.65%, +0.43%
SClause: 3187 -> 3191 (+0.13%)
Copies: 12716 -> 11804 (-7.17%); split: -7.42%, +0.25%
Branches: 3501 -> 3503 (+0.06%)
PreVGPRs: 5400 -> 5327 (-1.35%); split: -1.41%, +0.06%
VALU: 76455 -> 75492 (-1.26%); split: -1.30%, +0.04%
SALU: 23594 -> 23595 (+0.00%); split: -0.00%, +0.01%
VOPD: 1478 -> 1527 (+3.32%); split: +4.67%, -1.35%

Mostly helps FSR4.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35674>
 2025-06-25 11:03:30 +00:00
David Rosca
189bf9fe9a radv/video: Prefer visible VRAM for host visible context buffers
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In most cases this has little to no effect, but AV1 decode on VCN5
is up to 40% slower when the context buffer is in GTT.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35684>
 2025-06-25 09:39:11 +00:00
Samuel Pitoiset
2d4b4a296e radv: move pipeline layout implementation to radv_pipeline_layout.c/h
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35708>
 2025-06-25 07:52:12 +00:00
Samuel Pitoiset
46f78b40f0 radv: simplify add_descriptor_set() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35708>
 2025-06-25 07:52:12 +00:00
Samuel Pitoiset
f5a71a1262 radv: rename border_color_slot to border_color_index 
To match future work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35708>
 2025-06-25 07:52:12 +00:00
Samuel Pitoiset
c08a97633c radv: remove an useless check about custom border color 
The Vulkan spec is pretty clear and says:
 "VUID-VkSamplerCreateInfo-None-04012
  The maximum number of samplers with custom border colors which can be
  simultaneously created on a device is implementation-dependent and
  specified by the maxCustomBorderColorSamplers member of the
  VkPhysicalDeviceCustomBorderColorPropertiesEXT structure"

So this check can be removed because it would be an application bug
otherwise.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35708>
 2025-06-25 07:52:12 +00:00
Valentine Burley
a7f970ee6d zink/ci: Add glcts and piglit job on Cezanne with RADV 
AMD Cezanne is Vega, where we already have radeonsi coverage on Raven.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35682>
 2025-06-25 07:09:08 +00:00
Valentine Burley
57f97ad64a radeonsi/ci: Add glcts and piglit job on Mendocino 
Like Van Gogh, Mendocino is RDNA 2. This new job is intended to replace
the existing radeonsi-vangogh-glcts job, which couldn't run the full
test suite pre-merge.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35682>
 2025-06-25 07:09:07 +00:00
Valentine Burley
e5323ff07b radeonsi/ci: Rename radeonsi Collabora rule to make it unambiguous 
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35682>
 2025-06-25 07:09:06 +00:00
Valentine Burley
1e31ebc21e radeonsi/ci: Move full radeonsi-stoney-glcts-piglit job to pre-merge 
The full job previously ran in the nightly pipeline, but its runtime is
within the recommended 10-minute limit reported by deqp-runner. This
allows us to run it pre-merge and remove the separate nightly job.

Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35682>
 2025-06-25 07:09:05 +00:00
Georg Lehmann
1819e1caef radv: keep fp8 conversions vectorized
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Totals from 11 (0.01% of 80265) affected shaders:
MaxWaves: 102 -> 104 (+1.96%)
Instrs: 24105 -> 21027 (-12.77%)
CodeSize: 190744 -> 167480 (-12.20%)
VGPRs: 1968 -> 1920 (-2.44%)
Latency: 91890 -> 90302 (-1.73%); split: -2.86%, +1.13%
InvThroughput: 100616 -> 98496 (-2.11%); split: -2.24%, +0.13%
VClause: 802 -> 759 (-5.36%); split: -6.48%, +1.12%
Copies: 3131 -> 3329 (+6.32%); split: -0.48%, +6.80%
PreVGPRs: 1816 -> 1802 (-0.77%)
VALU: 12543 -> 11399 (-9.12%)
SALU: 4635 -> 2859 (-38.32%)
VOPD: 1133 -> 1195 (+5.47%); split: +7.33%, -1.85%

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35676>
 2025-06-25 05:34:48 +00:00
Georg Lehmann
21523dad96 radv/nir/lower_cmat: use nir_src_as_deref 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35633>
 2025-06-24 17:12:34 +00:00
Georg Lehmann
48fc8c8d1c radv/nir/lower_cmat: set optimal load/store alignment 
Allows vectorizing load/stores with sub dword types or with robustness.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35633>
 2025-06-24 17:12:33 +00:00
Georg Lehmann
ed2ecf9ef8 radv/nir/lower_cmat: share cmat_load/cmat_store code 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35633>
 2025-06-24 17:12:33 +00:00
Georg Lehmann
4ac6aae3a4 radv/nir/lower_cmat: fix gfx11 B->ACC conversion 
Of course I messed up the one path that's not tested by CTS.

Fixes: 249ccc6b4c ("radv/nir/lower_cmat: implement use conversions/transpose")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35713>
 2025-06-24 15:53:52 +00:00
Georg Lehmann
a61b564cf5 radv/ci: test VK_NV_cooperative_matrix2
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34793>
 2025-06-24 07:14:36 +00:00
Georg Lehmann
8256097c0c radv: advertise VK_NV_cooperative_matrix2/cooperativeMatrixConversions behind an env var 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34793>
 2025-06-24 07:14:35 +00:00
Georg Lehmann
249ccc6b4c radv/nir/lower_cmat: implement use conversions/transpose 
This could potentially be improved using packed 32bit subgroup ops,
but what we actually care about (gfx12 ACC -> B) is free.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34793>
 2025-06-24 07:14:34 +00:00
Konstantin Seurer
4cbbdc0a50 vulkan: Pass a structure to most BVH build callbacks 
It is annoying to change all function signatures when a driver needs
more information. There are also some callbacks that have a lot of
parameters and there have already been bugs related to that.

This patch tries to clean the interface by adding a struct that contains
all information that might be relevant for the driver and passing that
to most callbacks.

radv changes are:
Reviewed-by: Natalie Vock <natalie.vock@gmx.de>

anv changes are:
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>

turnip changes are:
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>

vulkan runtime changes are:

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35385>
 2025-06-23 20:43:43 +00:00
Konstantin Seurer
28713789ad vulkan: Replace get_*_key with get_build_config 
It is a cleaner API and gives more control about the build to the
driver.

Reviewed-by: Natalie Vock <natalie.vock@gmx.de>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35385>
 2025-06-23 20:43:43 +00:00
Eric Engestrom
4052348d09 radv/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35693>
 2025-06-23 16:58:19 +00:00
Eric Engestrom
8fa443b3a8 radeonsi/ci: document recent flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35693>
 2025-06-23 16:58:19 +00:00
Bas Nieuwenhuizen
b53602ce71 radv: Use packed invocation ids for newer CDNA. 
From inspection.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33963>
 2025-06-23 11:23:40 +00:00
Bas Nieuwenhuizen
9574089ea2 radv: Add CDNA register settings. 
From inspection.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33963>
 2025-06-23 11:23:40 +00:00
Bas Nieuwenhuizen
098770ec51 radv: Don't init gfx preamble without gfx support. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33963>
 2025-06-23 11:23:40 +00:00
Bas Nieuwenhuizen
d2e69dc734 radv: Add support for not having gfx queues. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33963>
 2025-06-23 11:23:40 +00:00
Georg Lehmann
60796c85d1 radv: expose VK_EXT_shader_float8 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
cbd17cb4d6 radv/nir/lower_cmat: handle float8 conversions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
c7a6b3318e radv: vectorize float8 conversions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
001cd632ee aco: select float8 to fp32 conversions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
19ca4be6b0 aco/isel: fix get_alu_src with 8bit vec2 source 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
f047a67fba nir,aco: optimize FP16_OFVL pattern created by vkd3d-proton 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:27 +00:00
Georg Lehmann
9e6adcbca0 aco: select fp32 to float8 conversions 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:26 +00:00
Georg Lehmann
3a45802514 aco/lower_to_hw: support saturating fp8 conversions 
Sadly amd only made this behavior controlable with global state.
We add a new pseudo opcode for this purpose and change FP16_OVFL
for each instruction. Ideally we would only do it once for clauses
and after ilp scheduling, but this can be improved in the future.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:25 +00:00
Georg Lehmann
65650cfef8 aco: emit float8 wmma 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35434>
 2025-06-23 07:59:25 +00:00
Mauro Rossi
28f7bb2418 radv: Fix gnu-empty-initializer error 
Fixes the following builing error happening with clang:

../src/amd/vulkan/radv_pipeline.c:817:29: error: use of GNU empty initializer extension [-Werror,-Wgnu-empty-initializer]
   struct amd_stats stats = {};
                            ^
1 error generated.

Fixes: 325dfd80 ("radv,aco: switch to shader statistics framework")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35677>
 2025-06-23 07:09:09 +00:00
Eric Engestrom
b3ed7f7b63 radeonsi/ci: reduce coverage of radeonsi-vangogh-glcts 
It currently takes 15min of test run time, which is higher than what
a merge-pipeline test is allowed.

Reduce it to 10min, and reduce the timeouts which were way too high.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35588>
 2025-06-20 20:24:59 +00:00
Yiwei Zhang
41d241bf6e radv: relax the native_handle_t::numFds requirement 
For modern gralloc impl, usually there's other fds appended in the
native_handle_t for gralloc buffer metadata sharing. So numFds can be
greater than 1, while the common agreement is still that the format
plane handles being placed at the beginning in the lack of a standard
format plane fd metadata query mapper api.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13163

Cc: mesa-stable
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35038>
 2025-06-20 16:51:18 +00:00
Karol Herbst
ee7536a1e3 radeonsi: implement SVM interfaces
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Acked-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35175>
 2025-06-20 15:10:42 +00:00
Rhys Perry
325dfd809a radv,aco: switch to shader statistics framework 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12756
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Rhys Perry
2382d657ec radv: use vk_outarray for pipeline statistics/executables 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35583>
 2025-06-20 09:26:58 +00:00
Dave Airlie
d68a1fc0d4 radv/video: port hevc slice header encoding from radeonsi 
The radeonsi code has been improved to handle reference lists
better, port the code to radv and vulkan API.

This has been updated to for Vulkan

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35628>
 2025-06-20 07:31:04 +00:00
Dave Airlie
f7d2939457 radv/video: add some missing hevc header bits 
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35628>
 2025-06-20 07:31:04 +00:00
Samuel Pitoiset
5e2fcdfea2 radv/meta: add a helper to determine if clearing is a full rect 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35603>
 2025-06-20 06:36:19 +00:00
Samuel Pitoiset
525e73c045 ac/descriptors: configure {Z,STENCIL}_READ_ONLY for ds surfaces on GFX12+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35603>
 2025-06-20 06:36:19 +00:00
Samuel Pitoiset
59dfa8c2f5 radv: switch to nir_intrinsic_load_input_attachment_coord
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35556>
 2025-06-20 06:12:24 +00:00