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Author SHA1 Message Date
Christoph Bumiller
7204b92101 nv50: clarify data for method 0x121c 2009-11-09 14:30:32 +01:00
Corbin Simpson
c9167d868c r300g: Fix up SW TCL rendering functions. 
They don't work, but at least they're clean now.
 2009-11-08 14:53:29 -08:00
Corbin Simpson
fe89863808 r300g: Protect against possibly missing Draw pointer. 
Part of the SW TCL revival.
 2009-11-08 14:53:29 -08:00
Corbin Simpson
11d9edf4c9 r300g: Unify context names for counts. 
From the SW TCL fixups.
 2009-11-08 14:53:29 -08:00
Corbin Simpson
b6f93e2607 r300g: Enable PSC/RS dump with new debugging flags. 2009-11-08 14:53:15 -08:00
Corbin Simpson
0525cb1273 r300g: Fix is_buffer_referenced. 2009-11-08 09:56:02 -08:00
Corbin Simpson
ee28a69188 r300g: Fix build error on old compilers. 
This dead code was still getting compiled, causing a bad ref in the lib.
 2009-11-08 09:35:07 -08:00
Corbin Simpson
a12fc1a9c4 r300g: Organize inlined state. 2009-11-07 14:32:31 -08:00
Corbin Simpson
547e939afb r300g: DCE. 
This must never have been called before; it's completely wrong.
 2009-11-07 14:14:19 -08:00
Corbin Simpson
9f49db6f84 r300g: Minor code cleanup to avoid confusion. 2009-11-07 13:37:07 -08:00
Corbin Simpson
fa6916cfef r300g: Remove do-nothing functions. 2009-11-07 13:12:15 -08:00
Corbin Simpson
c4fa0e4caa r300g: Remove faulty assert. 2009-11-07 13:07:52 -08:00
Corbin Simpson
b7322fd874 Merge branch 'r300g-vbo' 
This is an experimental HW TCL fastpath for r300g. It should run alright.

Thanks to osiris for making this possible.
 2009-11-07 12:03:04 -08:00
Corbin Simpson
0fe5f0c09a r300g: Be more verbose in what's killing us WRT vert formats. 2009-11-07 11:55:29 -08:00
Corbin Simpson
cd5b2a93d5 r300g: Comments. 2009-11-07 11:55:29 -08:00
Corbin Simpson
ef513776b5 r300g: Don't assert on oversized VBOs, just return FALSE. 2009-11-07 11:55:25 -08:00
Corbin Simpson
746c01b3b2 r300g: Moar vbo cleanup. 2009-11-07 11:53:14 -08:00
Corbin Simpson
b6c3954138 r300g: s/false/FALSE/ 
Also s/true/TRUE/
 2009-11-07 11:53:14 -08:00
Corbin Simpson
7da3cc4241 r300g: Clean up indexbuf render, switch to RELOC macro. 2009-11-07 11:53:14 -08:00
Corbin Simpson
7518d9b1b7 r300g: Clean up r300_setup_vertex_buffers. 2009-11-07 11:53:14 -08:00
Corbin Simpson
96b729f926 r300g: Don't pass hw_prim around in the context. 
And some other fixes.
 2009-11-07 11:53:14 -08:00
Corbin Simpson
24c6fdbd32 r300g: Use common state funcs for translating vert formats. 2009-11-07 11:53:14 -08:00
Maciej Cencora
1ef0341ea7 r300g: don't hang GPU on misbehaving apps 2009-11-07 11:53:13 -08:00
Maciej Cencora
3445f47697 r300g: VBOs WIP 2009-11-07 11:53:13 -08:00
Maciej Cencora
d8592d1724 r300g: add missing flush 2009-11-07 11:53:13 -08:00
Maciej Cencora
c7dfffc5d5 r300g: enable CS dumping 2009-11-07 11:53:13 -08:00
Maciej Cencora
6acb26eadf r300g: move vborender context function to seperate file 
r300g: Un-migrate r300_draw_render.

It'll make maintaining the SW TCL path easier.
 2009-11-07 11:53:06 -08:00
Jakob Bornecrantz
57d77c6a44 i915g: Fix comment in is buffer referenced 2009-11-07 19:31:18 +00:00
brian
18768393d1 mesa: move code after decl 
Fixes bug 24967.
 2009-11-07 08:18:07 -07:00
Christoph Bumiller
44cb5b5c66 nv50: enable all 32 threads of a warp 
This should be the default setting.
See also 7d967b9b7c.
 2009-11-07 10:48:36 +01:00
Eric Anholt
8baee3d25b i965: Use Compr4 instruction compression mode on G4X and newer. 
No statistically significant performance difference at n=3 with either
openarena or my GL demo, but cutting program size seems like a good
thing to be doing for the hypothetical app that has a working set near
icache size.
 2009-11-06 21:24:22 -08:00
Eric Anholt
ec66644ed0 i965: Share min/max between brw_wm_emit.c and brw_wm_glsl.c 2009-11-06 21:08:55 -08:00
Eric Anholt
cfa927766a i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.c 
This should fix issues with antialiased lines in GLSL.
 2009-11-06 21:08:55 -08:00
Eric Anholt
2b58c31257 i965: Share most of the WM functions between brw_wm_glsl.c and brw_wm_emit.c 
The PINTERP code should be faster for brw_wm_glsl.c now since brw_wm_emit.c's
had been improved, and pixel_w should no longer stomp on a neighbor to dst.
 2009-11-06 21:08:55 -08:00
Eric Anholt
1e5400c575 i965: Share math functions between brw_wm_glsl.c and brw_wm_emit.c. 2009-11-06 21:08:54 -08:00
Eric Anholt
7059aa0eff i965: Share the sop opcodes between brw_wm_glsl.c and brw_wm_emit.c. 2009-11-06 21:08:54 -08:00
Eric Anholt
726ad15606 i965: Share OPCODE_MAD between brw_wm_glsl.c and brw_wm_emit.c 2009-11-06 21:08:54 -08:00
Eric Anholt
bad5b120be i965: Share the DP3, DP4, and DPH between brw_wm_glsl.c and brw_wm_emit.c 2009-11-06 21:08:54 -08:00
Eric Anholt
06c1bc8a22 i965: Add generic GLSL code for unaliasing a 3-arg opcode, and share LRP code. 2009-11-06 21:08:54 -08:00
Eric Anholt
90629704ef i965: Use a normal alu1 emit for OPCODE_TRUNC. 2009-11-06 21:08:54 -08:00
Eric Anholt
71af508072 i965: Share basic ALU ops between brw_wm_glsl and brw_wm_emit.c 
This drops support for get_src_reg_imm in these, but the prospect of getting
brw_wm_pass*.c onto our GLSL path is well worth some temporary pain.
 2009-11-06 21:08:54 -08:00
Eric Anholt
0f34cdf621 i965: Collect GLSL src/dst regs up in generic code. 
This matches brw_wm_emit.c, which we'll be using shortly.  There's a
possible penalty here in that we'll allocate registers for unused channels,
since we aren't doing ref tracking like brw_wm_pass*.c does.  However, my
measurements on GM965 don't show any for either OA or UT2004 with the GLSL
path forced.
 2009-11-06 21:08:54 -08:00
Zack Rusin
e521bf7706 st/xorg: implement batching for the composite op 
something is broken so disabled for now
 2009-11-06 22:08:21 -05:00
Zack Rusin
4322346f3f st/xorg: batch solid fill requests 
instead of lots of very small transfers, one larger is a lot better
for performance
 2009-11-06 22:08:21 -05:00
Zack Rusin
e1730632aa st/xorg: start accumulating vertices in a common buffer 2009-11-06 22:08:21 -05:00
Zack Rusin
3f7df23ff5 st/xorg: use quads instead of triangle fans 
easier to split, accumulate and batch those
 2009-11-06 22:08:21 -05:00
Zack Rusin
6c44d399bd st/xorg: make the buffer size global 2009-11-06 22:08:21 -05:00
Eric Anholt
6b0bcfafab mesa: Reduce the source channels considered in optimization passes. 
Depending on the writemask or the opcode, we can often trim the source
channels considered used for dead code elimination.  This saves actual
instructions on 965 in the non-GLSL path for glean glsl1, and cleans up
the writemasks of programs even further.
 2009-11-06 14:27:35 -08:00
Eric Anholt
f3cacfe216 mesa: Fix remove_instructions to successfully remove when removeFlags[0]. 
This fixes the dead code elimination to work on the particular code
mentioned in the previous commit.
 2009-11-06 13:16:49 -08:00
Eric Anholt
e4e312d493 mesa: Add an optimization path to remove use of pointless MOVs. 
GLSL code such as:
	vec4 result = {0, 1, 0, 0};
	gl_FragColor = result;

emits code like:
  0: MOV TEMP[0], CONST[0];
  1: MOV OUTPUT[1], TEMP[0];

and this replaces it with:
  0: MOV TEMP[0], CONST[0];
  1: MOV OUTPUT[1], CONST[0];

Even when the dead code eliminator fails to clean up a now-useless MOV
instruction (since it doesn't do live/dead ranges), this should at reduce
dependencies.
 2009-11-06 13:16:49 -08:00