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i965: Collect GLSL src/dst regs up in generic code.

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This matches brw_wm_emit.c, which we'll be using shortly.  There's a
possible penalty here in that we'll allocate registers for unused channels,
since we aren't doing ref tracking like brw_wm_pass*.c does.  However, my
measurements on GM965 don't show any for either OA or UT2004 with the GLSL
path forced.
This commit is contained in:
Eric Anholt 2009-08-12 12:56:35 -07:00
parent e521bf7706
commit 0f34cdf621
2 changed files with 17 additions and 7 deletions
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2
src/mesa/drivers/dri/i965/brw_wm.h
View file

@ -162,6 +162,8 @@ struct brw_wm_instruction {
#define BRW_WM_MAX_CONST 256
#define BRW_WM_MAX_SUBROUTINE 16
/* used in masks next to WRITEMASK_*. */
#define SATURATE (1<<5)
/* New opcodes to track internal operations required for WM unit.

22
src/mesa/drivers/dri/i965/brw_wm_glsl.c
View file

@ -2771,6 +2771,21 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
if (c->fp->use_const_buffer)
fetch_constants(c, inst);
if (inst->Opcode != OPCODE_ARL) {
for (j = 0; j < 4; j++) {
if (inst->DstReg.WriteMask & (1 << j))
dst[j] = get_dst_reg(c, inst, j);
else
dst[j] = brw_null_reg();
}
}
for (j = 0; j < brw_wm_nr_args(inst->Opcode); j++)
get_argument_regs(c, inst, j, args[j], WRITEMASK_XYZW);
dst_flags = inst->DstReg.WriteMask;
if (inst->SaturateMode == SATURATE_ZERO_ONE)
dst_flags |= SATURATE;
if (inst->CondUpdate)
brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
else
@ -2866,13 +2881,6 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
break;
case OPCODE_DDX:
case OPCODE_DDY:
for (j = 0; j < 4; j++) {
if (inst->DstReg.WriteMask & (1 << j))
dst[j] = get_dst_reg(c, inst, j);
else
dst[j] = brw_null_reg();
}
get_argument_regs(c, inst, 0, args[0], WRITEMASK_XYZW);
emit_ddxy(p, dst, dst_flags, (inst->Opcode == OPCODE_DDX),
args[0]);
break;