Sync xe_drm.h with commit 6253cfa4c324 ("drm/xe/pmu: Drop interrupt pmu event").
No changes in code need, it is just removing uAPIs that are not used
by any UMD but it still breaks the uAPIs as uAPI numbers changed.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26151>
Sync xe_drm.h with commit xxxxx ("drm/xe/uapi: Fix naming of XE_QUERY_CONFIG_MAX_EXEC_QUEUE_PRIORITY").
One not so straght forward change is that sync VM binds now don't
require a syncobj anymore, the uAPI will return as soon the VM bind
operations are done.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25300>
Sync xe_drm.h with commit e51e857ffad4 ("drm/xe/uapi: Remove useless max_page_size").
Most relevant changes are the removal of max_page_size from
drm_xe_query_mem_region and the typo fix in XE_QUERY_CONFIG_MIN_ALIGNMENT.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25162>
Sync with commit f16c04291100 ("drm/xe: Rename engine to exec_queue").
With that Iris and ANV had some major renames that were done manually
as there is to many "engine" in non-related code.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24476>
git://anongit.freedesktop.org/drm/drm 2222dcb0775d36de28992f56455ab3967b30d380
The motivation for this change in to get the uapi changes from:
commit 81b1b599dfd71c958418dad586fa72c8d30d1065
Author: Fei Yang <fei.yang@intel.com>
Date: Tue Jun 6 12:00:42 2023 +0200
drm/i915: Allow user to set cache at BO creation
Specifically, the I915_GEM_CREATE_EXT_SET_PAT extension.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
NOTE: skipped AMD header update due to build error.
From drm-next at the following commit:
commit 2e1492835e439fceba57a5b0f9b17da8e78ffa3d
Merge: 85d712f033d2 43049f17b526
Author: Dave Airlie <airlied@redhat.com>
Date: Fri Jun 2 13:38:48 2023 +1000
Merge tag 'drm-misc-next-2023-06-01' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
Signed-off-by: Alan Previn <alan.previn.teres.alexis@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23382>
My second attempt at a minimally invasive reshuffle of the uAPI,
this time only forcibly aligning structures to 32-bits or 64-bits
depending on the members which follow, so that 64-bit userspace
is identical to the current unmerged kernel module, and the 32-bit
compat userspace aligns with that, and functions rather than
crashing.
Should work just fine with the current drm-xe-next Git tree, which
is rebased on 6.3.0-1, with a few extra changes, as of this commit.
Based on commit 2cd469458fcc24c5f345ad39721a1aedaf70ec0f ("drm/xe: Add explicit padding to uAPI definition")
Signed-off-by: Christopher Snowhill <kode54@gmail.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22652>
To replace the hard-coded values.
Not fully importing gpu_scheduler.h because it includes several Linux
specific headers that will make the life of anyone porting Xe to
other Unix harder.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22112>
Based on commit f6e26dff8fa3 ("drm/xe: Add max engine priority to xe query")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22112>
For testing, the conformant behavior can be enabled by setting
conformant_trunc_coord to true manually and running this to enable
the conformant behavior in hw:
umr -w *.*.regTA_CNTL2 0x40000
The layer index rounding and TRUNC_COORD resetting workarounds can disabled
in the shader compiler.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
In file included from src/vulkan/wsi/wsi_common_drm.c:34:
include/drm-uapi/dma-buf.h:23:10: fatal error: 'linux/types.h' file not found
#include <linux/types.h>
^~~~~~~~~~~~~~~
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16987>
From https://cgit.freedesktop.org/drm-misc/
9cc4853e4781bf0dd0f35355dc92d97c9da02f5d
Author: Antonio Borneo <antonio.borneo@foss.st.com>
Date: Tue Jun 7 23:31:44 2022 +0200
drm: adv7511: override i2c address of cec before accessing it
This version has the new sync_file import/export ioctls.
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16987>
From drm-next at the following commit:
commit 7f7a942c0a338c4a2a7b359bdb2b68e9896122ec
Merge: 0a20a3ea4259 ddcb8fa6514f
Author: Dave Airlie <airlied@redhat.com>
Date: Thu Oct 27 14:44:02 2022 +1000
Merge tag 'drm-next-20221025' of git://linuxtv.org/pinchartl/media into drm-next
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9780>
Updated from changes in commit 730c2bf4ad39 ("drm/panfrost: Add support for
devcoredump").
From drm-misc/drm-misc-next.
Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034>
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
v2. Pull in the header from drm-next at commit
9035039e1ed691cd893777a42e048003a2f349d6
Cc: 22.1 <mesa-stable>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14521>
git://anongit.freedesktop.org/drm/drm 9bda072a7bec278c424ad660373e69d8e4a3385d
Among other changes, this provides DRM_I915_QUERY_HWCONFIG_BLOB and
DRM_I915_QUERY_GEOMETRY_SUBSLICES, which are needed for DG2 support.
Cc: 22.1 <mesa-stable>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16174>
If supported by host virglrenderer and host kernel, use userspace
allocated GPU virtual addresses. This lets us avoid stalling on
waiting for response from host kernel until we need to know the
host handle (which is usually not until submit time).
Handling the async response from host to get host_handle is done
thru the submit_queue, so that in the submit path (hot) we do not
need any additional synchronization to know that the host_handle
is valid.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16086>
ring_idx zero is the CPU ring, others map to the priority level, as each
priority level for a given drm_file on the host kernel side maps to a
single fence timeline.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16086>
Add a new backend to enable using native driver in a VM guest, via a new
virtgpu context type which (indirectly) makes host kernel interface
available in guest and handles the details of mapping buffers to guest,
etc.
Note that fence-fd's are currently a bit awkward, in that they get
signaled by the guest kernel driver (drm/virtio) once virglrenderer in
the host has processed the execbuf, not when host kernel has signaled
the submit fence. For passing buffers to the host (virtio-wl) the egl
context in virglrenderer is used to create a fence on the host side.
But use of out-fence-fd's in guest could have slightly unexpected
results. For this reason we limit all submitqueues to default priority
(so they cannot be preepmted by host egl context). AFAICT virgl and
venus have a similar problem, which will eventually be solveable once we
have RESOURCE_CREATE_SYNC.
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14900>
Extends command submission ioctls to support multiple semaphores through
generic ioctl extension design. In this approach, a multisync extension
subclasses a generic ioctl extension struct (base) and enables more than
one wait and signal semaphores. Multisync extension also uses v3d_queue
to specify the wait_stage, i.e. which job should sync before start (wait
semaphores).
Signed-off-by: Melissa Wen <mwen@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13178>
This change allows creating contexts of depending on set of
context parameters. The meaning of each of the parameters
is listed below:
1) VIRTGPU_CONTEXT_PARAM_CAPSET_ID
This determines the type of a context based on the capability set
ID. For example, the current capsets:
VIRTIO_GPU_CAPSET_VIRGL
VIRTIO_GPU_CAPSET_VIRGL2
define a Gallium, TGSI based "virgl" context. We only need 1 capset
ID per context type, though virgl has two due a bug that has since
been fixed.
The use case is the "gfxstream" rendering library and "venus"
renderer.
gfxstream doesn't do Gallium/TGSI translation and mostly relies on
auto-generated API streaming. Certain users prefer gfxstream over
virgl for GLES on GLES emulation. {gfxstream vk}/{venus} are also
required for Vulkan emulation.
The goal is for guest userspace to choose the optimal context type
depending on the situation/hardware.
2) VIRTGPU_CONTEXT_PARAM_NUM_RINGS
This tells the number of independent command rings that the context
will use. This value may be zero and is inferred to be zero if
VIRTGPU_CONTEXT_PARAM_NUM_RINGS is not passed in. This is backwards
compatibility for virgl, which has one big giant command ring for all
commands.
The maxiumum number of rings is 32. In practice, multi-queue or
multi-ring submission is used for powerful dGPUs and virtio-gpu
may not be the best option in that case (see PCI passthrough or
rendernode forwarding).
3) VIRTGPU_CONTEXT_PARAM_POLL_RING_IDX_MASK
This is a mask of ring indices for which the DRM fd is pollable.
For example, if VIRTGPU_CONTEXT_PARAM_NUM_RINGS is 2, then the mask
may be:
[ring idx] | [1 << ring_idx] | final mask
-------------------------------------------
0 1 1
1 2 3
The "Sommelier" guest Wayland proxy uses this to poll for events
from the host compositor.
Reviewed-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Tested-by: Anthoine Bourgeois <anthoine.bourgeois@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7712>
From drm-next at the following commit:
commit a22c074fd1dd52a8b41dd6789220409b64093e9c
Merge: cb22f12f3025 3bfa7d40ce73
Author: Dave Airlie <airlied@redhat.com>
Date: Thu Aug 12 11:20:16 2021 +1000
Merge tag 'drm-intel-next-2021-08-10-1' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11888>
Extends CL submit to include performance monitor, and add proper ioctl
calls to create, destroy and query performance monitor counters.
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10666>
