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drm-uapi/i915_drm.h: Update from drm-next (2023-06-09)
git://anongit.freedesktop.org/drm/drm 2222dcb0775d36de28992f56455ab3967b30d380
The motivation for this change in to get the uapi changes from:
commit 81b1b599dfd71c958418dad586fa72c8d30d1065
Author: Fei Yang <fei.yang@intel.com>
Date: Tue Jun 6 12:00:42 2023 +0200
drm/i915: Allow user to set cache at BO creation
Specifically, the I915_GEM_CREATE_EXT_SET_PAT extension.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22878>
This commit is contained in:
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fce905f613
commit
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1 changed files with 43 additions and 1 deletions
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@ -674,7 +674,8 @@ typedef struct drm_i915_irq_wait {
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* If the IOCTL is successful, the returned parameter will be set to one of the
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* following values:
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* * 0 if HuC firmware load is not complete,
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* * 1 if HuC firmware is authenticated and running.
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* * 1 if HuC firmware is loaded and fully authenticated,
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* * 2 if HuC firmware is loaded and authenticated for clear media only
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*/
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#define I915_PARAM_HUC_STATUS 42
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@ -3679,9 +3680,13 @@ struct drm_i915_gem_create_ext {
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*
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* For I915_GEM_CREATE_EXT_PROTECTED_CONTENT usage see
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* struct drm_i915_gem_create_ext_protected_content.
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*
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* For I915_GEM_CREATE_EXT_SET_PAT usage see
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* struct drm_i915_gem_create_ext_set_pat.
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*/
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#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
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#define I915_GEM_CREATE_EXT_PROTECTED_CONTENT 1
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#define I915_GEM_CREATE_EXT_SET_PAT 2
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__u64 extensions;
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};
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@ -3796,6 +3801,43 @@ struct drm_i915_gem_create_ext_protected_content {
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__u32 flags;
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};
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/**
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* struct drm_i915_gem_create_ext_set_pat - The
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* I915_GEM_CREATE_EXT_SET_PAT extension.
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*
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* If this extension is provided, the specified caching policy (PAT index) is
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* applied to the buffer object.
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*
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* Below is an example on how to create an object with specific caching policy:
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*
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* .. code-block:: C
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*
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* struct drm_i915_gem_create_ext_set_pat set_pat_ext = {
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* .base = { .name = I915_GEM_CREATE_EXT_SET_PAT },
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* .pat_index = 0,
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* };
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* struct drm_i915_gem_create_ext create_ext = {
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* .size = PAGE_SIZE,
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* .extensions = (uintptr_t)&set_pat_ext,
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* };
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*
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* int err = ioctl(fd, DRM_IOCTL_I915_GEM_CREATE_EXT, &create_ext);
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* if (err) ...
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*/
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struct drm_i915_gem_create_ext_set_pat {
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/** @base: Extension link. See struct i915_user_extension. */
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struct i915_user_extension base;
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/**
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* @pat_index: PAT index to be set
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* PAT index is a bit field in Page Table Entry to control caching
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* behaviors for GPU accesses. The definition of PAT index is
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* platform dependent and can be found in hardware specifications,
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*/
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__u32 pat_index;
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/** @rsvd: reserved for future use */
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__u32 rsvd;
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};
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/* ID of the protected content session managed by i915 when PXP is active */
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#define I915_PROTECTED_CONTENT_DEFAULT_SESSION 0xf
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