Commit graph

72489 commits

Author SHA1 Message Date
Silvio Vilerino
4b366f8824 d3d12: Add HAVE_GALLIUM_D3D12_VIDEO guards for d3d12_video_encoder_set_max_async_queue_depth/d3d12_video_encoder_get_last_slice_completion_fence
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Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14709
Fixes: e55b2b5064 ("d3d12: Add get_video_enc_last_slice_completion_fence interop")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39457>
2026-01-22 19:16:53 +00:00
Silvio Vilerino
237313a243 d3d12: Add missing using Microsoft::WRL:ComPtr in d3d12_context_common
Fixes: b06b2fbaba ("d3d12: Remove Agility v717 guards for features now available in v618")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39457>
2026-01-22 19:16:52 +00:00
Lionel Landwerlin
21661f66fc iris: fix incorrect intrinsic usage on ELK
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: faa857a061 ("intel: rework push constant handling")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14708
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39443>
2026-01-22 18:35:42 +00:00
Michel Dänzer
a74ffd6900 Pass the destination buffer size minus one to strncpy
Copying the last byte was pointless, since the next line overwrites it,
and resulted in a compiler warning:

../src/intel/common/intel_measure.c: In function 'intel_measure_init':
../src/intel/common/intel_measure.c:68:7: warning: 'strncpy' specified bound 1024 equals destination size [-Wstringop-truncation]
   68 |       strncpy(env_copy, env, 1024);
      |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

This allows dropping -Wno-error=stringop-truncation from the
debian-x86_64-asan & debian-{arm64,x86_64}-ubsan CI jobs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39429>
2026-01-22 15:44:09 +01:00
Rob Clark
4e28ac2870 ir3: Use fd_dev_info from ir3_compiler
Rather than copying an ever growing list of params from fd_dev_info to
ir3_compiler, just store the info pointer in the compiler and use that
directly.

Mechanical change.  But deletes code and removes an extra step from
adding compiler related dev info props.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39442>
2026-01-21 22:53:23 +00:00
Connor Abbott
6a1c8d3a0c ir3, freedreno, turnip: Lower io earlier
On the gallium side, set the NIR option to leave IO lowered after
linking when using GLSL. On the turnip side, move up nir_lower_io to
as early as currently possible. Further turnip passes will have to be
converted to intrinsics before we can switch to using the new linker.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39328>
2026-01-21 20:54:21 +00:00
Connor Abbott
14269166b2 freedreno, turnip, ir3: Always gather streamout info from NIR
pipe_stream_output_info is considered deprecated, and not filled out for
drivers using I/O intrinsics. Switch to using NIR instead, which should
be more reliable and allows us to stop having separate paths for
gathering this info in turnip and freedreno.

Since we don't have a map of location -> driver_location before
compiling, we have to switch to using locations in the streamout info.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39328>
2026-01-21 20:54:20 +00:00
Connor Abbott
b74e301c7e ir3, freedreno, tu: Move nir_lower_io out of post_finalize()
In gallium, the GLSL linker already lowers variables so this was mostly
a no-op. However in order to use common passes that operate on
intrinsics in turnip, and eventually convert turnip passes to use
intrinsics, we need to split out nir_lower_io so that we can call it
earlier. Split out the call to nir_lower_io to a separate function, and
move it up in turnip. In the future we will move it up even further
until we can use the new NIR linking passes that operate on intrinsics.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39328>
2026-01-21 20:54:16 +00:00
Jesse Natalie
b8e1ca9913 wgl: Support PFD_SWAP_COPY pixel formats
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39441>
2026-01-21 20:37:59 +00:00
Jesse Natalie
2d46ac527c wgl: Delete stw_pfd_flag
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39441>
2026-01-21 20:37:58 +00:00
Timur Kristóf
d7f3096ee9 radeonsi: Remove previous mitigation of CS regalloc hang bug
Now that all larger workgroup sizes are lowered to 256,
the old workaround is not needed anymore.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39288>
2026-01-21 17:24:57 +00:00
Timur Kristóf
f3e8e93906 radeonsi: Allow using compute queue with regalloc hang bug on GFX7
Now that all larger workgroup sizes are lowered to 256,
the regalloc hang cannot mess up the compute queues anymore.

Still don't allow compute queues on GFX6 though,
those have never been enabled ever since RadeonSI started using
the compute queue in a1378639ab - let's keep it that way.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39288>
2026-01-21 17:24:56 +00:00
Timur Kristóf
0961aba8a7 radeonsi: Lower larger workgroups to 256 for CS regalloc bug
Even though radeonsi may not use compute queues, other processes
might run compute jobs in the background, so radeonsi must make
sure not to use	larger than 256	sized workgroups on GPUs that
are affected by	the regalloc hang.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39288>
2026-01-21 17:24:56 +00:00
Timur Kristóf
dc41023510 radeonsi: Limit variable workgroup size to 256 for CS regalloc bug
Even though radeonsi may not use compute queues, other processes
might run compute jobs in the background, so radeonsi must make
sure not to use larger than 256 sized workgroups on GPUs that
are affected by the regalloc hang.

Unfortunately that means that for now RadeonSI won't be able to
support ARB_compute_variable_group_size on these GPUs.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39288>
2026-01-21 17:24:56 +00:00
Utku Iseri
e58b32a8c1 zink: handle split DS blits with zink_blit calls
This fixes resource tracking and state setting for depth-only blits.

Cc: mesa-stable
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39410>
2026-01-21 16:33:47 +00:00
Lionel Landwerlin
79aff6e274 brw: use fp64 to compute coarse_z
For some reason we cannot get the precision needed from the HW at fp32.

LNL internal fossildb changes :

Totals from 7226 (0.76% of 947978) affected shaders:
Instrs: 5512598 -> 5586086 (+1.33%); split: -0.00%, +1.33%
Cycle count: 153836056 -> 155079472 (+0.81%); split: -0.77%, +1.58%
Spill count: 2025 -> 2021 (-0.20%); split: -0.35%, +0.15%
Fill count: 3139 -> 3112 (-0.86%); split: -1.12%, +0.25%
Max live registers: 1034601 -> 1034632 (+0.00%); split: -0.00%, +0.00%
Max dispatch width: 207296 -> 207264 (-0.02%); split: +0.02%, -0.03%
Non SSA regs after NIR: 1147942 -> 1109326 (-3.36%)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12726
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38996>
2026-01-21 16:00:52 +00:00
Lionel Landwerlin
a19e949824 brw: move coarse_z computation to NIR
So that we can print it easily with debug printfs

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38996>
2026-01-21 16:00:52 +00:00
Lucas Stach
063d480a62 etnaviv: simplify constant dirty bit handling during state emission
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We don't need to take ETNA_DIRTY_SHADER into consideration for pure
updates of the constant states. When the shader is dirty constants
and code will be uploaded together and the update path will be skipped.

The uniform cache in the context has been removed in ee1ed59458
("etnaviv: prep for UBOs"), so the comment referencing this cache
is confusing and can go as well.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39422>
2026-01-21 15:42:45 +00:00
Lucas Stach
bfd7a8d8d3 etnaviv: check all necessary dirty bits when marking constbufs during draw
Constant buffers may be changed without the shader changing.
Check the correct dirty bits when marking constant buffers
as read during the draw to ensure proper synchronization.

Fixes: a40a6e551e ("etnaviv: draw: only mark resources as read/written when the state changed")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39422>
2026-01-21 15:42:45 +00:00
Mario Kleiner
f2aaa9ce00 dri,gallium: Add support for RGB[A]16_UNORM display formats.
These are useful for displaying very high color precision images with
more than 10 bpc color depth, and also more precision than what fp16
can do on a standard dynamic range (SDR) display, where fp16 for values
in the unorm 0.0 - 1.0 range is about equivalent to at most ~11 bpc
linear color depth. This is especially useful for and aimed at scientific
applications, e.g., neuroscience and other bio-medical research cases.

At least current generation AMD gpu's released during the last 10 years
and supported by amdgpu-kms + atomic modesetting do allow for scanout of
such 16 bpc framebuffers and of up to 12 bpc output to suitable HDMI or
DisplayPort high precision displays.

We gate the format behind a new driconf option 'allow_rgb16_configs',
which defaults to true, but allows to disable the formats if any issues
should arise.

Most regular applications won't need the high display precision of
these new 16 bpc 64 bpp formats which have higher memory and bandwidth
requirements, and therefore a potential undesired performance impact
for regular apps. Followup per-platform enablement commits will use
the EGL_EXT_config_select_group extension to put these 16 bpc unorm
formats into a lower priority config select group 1, so they don't get
preferably chosen by default by eglChooseConfig(), but must be explicitely
requested by client applications which really need the high color
precision of these 64 bpp formats and are happy to pay the potential
performance impact. Thanks to Adam Jackson for pointing me to the
EGL_EXT_config_select_group extension.

If the format would be put into the default config select group 0, a
simple EGL eglChooseConfig() call would end up choosing these formats,
which is not what such regular apps would want.

Tested to not cause any change on native X11/EGL and X11/GLX, which only
supports at most 30 bpc / 32 bpp formats.

Followup commits will enable these formats for the EGL/Wayland backend,
and on the EGL/DRM backend.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38588>
2026-01-21 12:29:03 +00:00
Qiang Yu
7d73ea20ec radeonsi: fix primitive restart gpu hang for pre gfx10
PAL always set WD_SWITCH_ON_EOP for pre gfx10 when primitve
restart is enabled to prevent gpu hang.

It only happens when specific index stream with primitive
restart. Since we don't know what's the exact problem,
just follow PAL to disable 4x primitive rate when primitive
restart is enabled.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14629
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39292>
2026-01-21 02:38:25 +00:00
Thong Thai
c4f05bdf60 frontends/va: include picture_*.c based on selected codec
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Only add the appropriate picture_{h264,h264_enc,vc1,...}.c file when the
corresponding codec is enabled via the -Dvideo-codecs flag.

Add stub functions to va_private.h, so that the code in decode.c and
encode.c remains untouched.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39354>
2026-01-20 22:42:08 +00:00
Thong Thai
f4959c16c8 meson: add mpeg12dec as a video-codec
Add mpeg12dec as a selectable video-codec and add a corresponding check
to vl_codec_supported.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39354>
2026-01-20 22:42:08 +00:00
Thong Thai
f9c1ba8c17 meson: add jpeg as a video-codec
Add jpeg as a selectable video-codec and add a corresponding check to
vl_codec_supported.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39354>
2026-01-20 22:42:08 +00:00
Faith Ekstrand
934cfc0223 panfrost: SPDX everything
This replaces all full lisence headers with SPDX identifiers and
generally makes things more consistent.  I've also dropped the few
remaining author tags.  If someone wants to know who wrote a bit of
code, `git blame` is going to be way more accurate than author tags
anyway.

Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39397>
2026-01-20 20:49:33 +00:00
anonymix007
7300aa34a0 tgsi/nir: Store output variables before each TGSI_OPCODE_RET
Fixes: 885323ea3a
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39379>
2026-01-20 19:54:23 +00:00
Utku Iseri
5a5a87ecdb zink: use gfx_pipeline_state.dirty as a pipeline update condition
Without this, non-dynamically-supported state changes that require a pipeline
change (like blend states without full_ds3) that happen in between drawcalls
get ignored unless another one of the conditions also happened to be true.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39381>
2026-01-20 18:48:27 +00:00
Utku Iseri
d27dd392b8 zink: don't set pipeline_state.dirty for halfz with full_ds3
This helps reduce the upcoming pipeline check conditions

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39381>
2026-01-20 18:48:27 +00:00
Utku Iseri
7103457acb zink: don't set gfx_pipeline_state.dirty if min_samples didn't change
This helps reduce the upcoming pipeline check conditions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39381>
2026-01-20 18:48:27 +00:00
Utku Iseri
f2273866b1 zink: set gfx_pipeline_state.dirty for blit rp changes
This was being hidden by set_min_samples always setting
the dirty flag during blit state save/restore.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39381>
2026-01-20 18:48:27 +00:00
Icenowy Zheng
734b6a8c35 vk: descriptors: sort bindings along with flags
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Vulkan spec requires binding flags to be matched with the binding with
the same index, however currently bindings are sorted with flags not
properly sorted, which leads to bindings and flags mismatch.

Resolve this by adding optional flags info to the parameters of
vk_create_sorted_bindings(), and refactoring panvk/pvr (which really
pair bindings and flags instead of only iterating flags) to use sorted
flags.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Ryan Mckeever <ryan.mckeever@collabora.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38967>
2026-01-20 15:55:47 +00:00
Georg Lehmann
af68c08e88 radeonsi: only override float_mode for llvm
aco implements the same logic, and in the future it will make changes to
config->float_mode to avoid unnecessary s_setreg.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38815>
2026-01-20 14:48:21 +00:00
Pohsiang (John) Hsu
487da8f248 mediafoundation: set rc mode in GetCodecPrivateData for 2 pass rc mode
Reviewed-by: Yubo Xie <yuboxie@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39402>
2026-01-20 12:02:03 +00:00
Pohsiang (John) Hsu
581ffd1450 d3d12: fix slice support for setting number of coding units per slice
Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39402>
2026-01-20 12:02:03 +00:00
Pierre-Eric Pelloux-Prayer
f5f84e6739 radeonsi: add asserts to validate emit functions use of atoms
emit functions shouldn't dirty any atom.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39308>
2026-01-20 09:56:28 +00:00
Pierre-Eric Pelloux-Prayer
0efe11e84e radeonsi/sqtt: restore barrier_flags in si_sqtt_init_cs
si_sqtt_start / si_sqtt_stop use emit_barrier which clears barriers_flags.
Since these functions are used to build an auxiliary cs which will only
be emitted later (on sqtt enablement/disablement) it shouldn't clear
the global barrier_flags value.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39308>
2026-01-20 09:56:28 +00:00
Pierre-Eric Pelloux-Prayer
3bc60e1bb0 radeonsi: add extra flags param to si_emit_barrier_direct
Most callers wants to add new flags to barrier_flags so add
a parameter.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39308>
2026-01-20 09:56:28 +00:00
Pierre-Eric Pelloux-Prayer
9175388740 radeonsi: add a si_clear_and_set_barrier_flags helper
Same as si_set_barrier_flags except it can be used to clear
some barriers first.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39308>
2026-01-20 09:56:27 +00:00
Pierre-Eric Pelloux-Prayer
db4b1cdb3b radeonsi: fix references to sctx->flags in documentation
It was renamed barrier_flags.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39308>
2026-01-20 09:56:26 +00:00
Pierre-Eric Pelloux-Prayer
c77828c8e9 radeonsi: add a si_set_barrier_flags helper
The pattern:

  ctx->barrier_flags |= ...;
  si_mark_atom_dirty(sctx, &sctx->atoms.s.barrier);

is used a lot, let's add an inline helper. This prevents
forgetting the call to si_mark_atom_dirty.

si_upload_bindless_descriptors is special because we're
already in the emit phase so we shouldn't dirty barrier
again.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39308>
2026-01-20 09:56:26 +00:00
Rob Clark
49f2545de6 freedreno/registers: Fix gen8 TPL1_A2D_BLT_CNTL
START_OFFSET_TEXELS is removed.  Instead TPL1_A2D_SRC_TEXTURE_BASE can
take an unaligned address for IMG_BUFFER.

Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39167>
2026-01-20 02:27:30 +00:00
Rob Clark
f5f9fecfc3 freedreno/registers: Fix gen8 TPL1_MODE_CNTL
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39167>
2026-01-20 02:27:29 +00:00
Faith Ekstrand
13926b3492 panfrost: Lower pixel-local storage to load/store_tile in NIR
Some checks are pending
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Now that we have intrinsics which map directly to the hardware opcodes,
we can lower PLS inside the gallium driver instead of the back-end
compiler having to know anything about it.  This simplifies the back-end
and is less code, if you ignore the new copyright header.

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39367>
2026-01-19 21:33:14 +00:00
Mike Blumenkrantz
ae5c0db8cb zink: reuse transient attachments for format view shadowing
a longstanding issue in zink has been the scenario where a dmabuf is
created for e.g., RGBA8888, then the app tries to do SRGB, but the driver
doesn't support mutable formats with the dmabuf modifier. in this scenario, the app
would either crash or break unpredictably

by reusing the existing transient mechanism (previously only for msrtss emulation),
these dmabufs can instead have a shadow image which handles mutable formats and
then syncs back to the main image when necessary

this should greatly improve the situation on e.g., Intel

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:06 +00:00
Mike Blumenkrantz
34ba521acd zink: explicitly null pipe_resource::next when creating transients
this otherwise blows up the aux resources

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:06 +00:00
Mike Blumenkrantz
9fd8041d24 zink: create new transient image if the sample count doesn't match
otherwise this will keep reusing the previous transient

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:06 +00:00
Mike Blumenkrantz
957e19e8a7 zink: flag immutable handles as such when creating resources
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:05 +00:00
Mike Blumenkrantz
e904300270 zink: improve checks for srgb mutability
normally it's assumed that srgb-ness is baked in, but this isn't
always the case (e.g., for imported dmabufs on intel)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:05 +00:00
Mike Blumenkrantz
85d98500bd zink: rename msaa_expand to attachment_shadow
this mechanism can be used for more than just msrtss

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:04 +00:00
Mike Blumenkrantz
b0b74b7362 zink: automatically rewrite clears where possible to avoid using format views
when executing a renderpass solely to apply clears, there's no need to
create a format view for an image because the clear can just be rewritten

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39336>
2026-01-19 18:37:04 +00:00