While Broadwell is very good about UINT formats, HSW is more restrictive.
Neither R8G8B8_UINT nor R16G16B16_UINT really exist on HSW. It should be
safe to just use the unorm formats.
v2: Don't cast the enum to a boolean (Jason)
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
After 3ecd357d81, it may be possible for
the VS to get assigned all of the URB space.
On Ivy Bridge, this will cause the offset for the other stages to be
16, which cannot be packed into the ConstantBufferOffset field of
3DSTATE_PUSH_CONSTANT_ALLOC_*.
Instead we can set the offset to zero if the stage size is zero.
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
This allows us to avoid doing some unneeded work on the meta paths where we
know that the image view will be used for exactly one thing. The meta
paths also sometimes do things that aren't quite valid like setting the
array slice on a 3-D texture and we want to limit the number of paths that
need to be able to sensibly handle the lies.
If you have an out-of-tree build, gen8_pack.h and friends will not be in
the same folder as genX_pack.h so this will be a problem. We fixed
out-of-tree earlier by adding the genxml folder to the includes for the
vulkan driver. However, this is not a good long-term solution because we
want to use it in ISL as well.
Consecutive tiles are separated by the size of the tile, not by the
logical tile width.
v2: Remove extra subtraction (Ville)
Add parenthesis (Jason)
v3: Update the unit tests for the function
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Both logic and indentation suggests that the ; were not intended here.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Previously we allocated 4kB of push constant space for VS, GS, and PS
(for a total of 12kB) no matter what. This works, but doesn't fully
utilize the space - we have 16kB or 32kB of space.
This makes anv use the same method as brw - divide up the space evenly
among all active shader stages. This means HS and DS would get space,
if those shader stages existed.
In the future, we can probably do better by inspecting how many push
constants each shader stage uses, and weight things accordingly. But
this is strictly better than the old code, and ideally we'd justify
a fancier solution with actual performance data.
