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anv/device: Store the default MOCS in the device
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d798762cdb
commit
4a9b805ce5
3 changed files with 15 additions and 7 deletions
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@ -680,6 +680,8 @@ struct anv_device {
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struct anv_block_pool scratch_block_pool;
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uint32_t default_mocs;
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pthread_mutex_t mutex;
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};
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@ -859,19 +861,19 @@ __gen_combine_address(struct anv_batch *batch, void *location,
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.L3CacheabilityControlL3CC = 1, \
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}
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#define GEN8_MOCS { \
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.MemoryTypeLLCeLLCCacheabilityControl = WB, \
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.TargetCache = L3DefertoPATforLLCeLLCselection, \
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.AgeforQUADLRU = 0 \
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#define GEN8_MOCS (struct GEN8_MEMORY_OBJECT_CONTROL_STATE) { \
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.MemoryTypeLLCeLLCCacheabilityControl = WB, \
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.TargetCache = L3DefertoPATforLLCeLLCselection, \
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.AgeforQUADLRU = 0 \
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}
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/* Skylake: MOCS is now an index into an array of 62 different caching
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* configurations programmed by the kernel.
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*/
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#define GEN9_MOCS { \
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/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
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.IndextoMOCSTables = 2 \
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#define GEN9_MOCS (struct GEN9_MEMORY_OBJECT_CONTROL_STATE) { \
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/* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
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.IndextoMOCSTables = 2 \
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}
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#define GEN9_MOCS_PTE { \
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@ -37,6 +37,9 @@
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VkResult
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genX(init_device_state)(struct anv_device *device)
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{
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GENX(MEMORY_OBJECT_CONTROL_STATE_pack)(NULL, &device->default_mocs,
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&GENX(MOCS));
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struct anv_batch batch;
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uint32_t cmds[64];
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@ -37,6 +37,9 @@
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VkResult
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genX(init_device_state)(struct anv_device *device)
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{
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GENX(MEMORY_OBJECT_CONTROL_STATE_pack)(NULL, &device->default_mocs,
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&GENX(MOCS));
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struct anv_batch batch;
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uint32_t cmds[64];
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