Commit graph

101481 commits

Author SHA1 Message Date
Eric Anholt
697e2e1f26 v3d: Always set up the qregs for CSD payload.
We were failing to set up payload[1] for use by LocalInvocationIndex/ID
and shared variable accesses if gl_WorkGroupID/gl_GlobalInvocationID
wasn't used (possibly because you only have one workgroup).  You're always
going to use payload[1], and payload[0] is common enough and we have DCE
in the backend to clean it up if it happens to not be used.
2019-04-16 12:10:39 -07:00
Eric Anholt
1bc71e8b65 v3d: Only look up the 3rd texture gather offset for non-arrays.
Fixes assertion failures in the CTS since Karol's cleanup when NIR started
noticing that we were reading an invalid component.

Fixes: 5450f1c9fb ("v3d: prefer using nir_src_comp_as_int over nir_src_as_const_value")
2019-04-16 12:07:59 -07:00
Caio Marcelo de Oliveira Filho
a0dae78e72 spirv: Tell which opcode or value is unhandled when failing
v2: When available, include the opcode name too. (Karol)

v3: Use more to_string helpers. (Karol)
    Include the wrong bit_size in those failures.
    Include the capability number in spv_check_supported.
    Provide vtn_fail_with_* macros to avoid noise in the call sites.

v4: Provide macros only for opcode and decoration, which have enough
    usages to justify them. (Jason)

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-04-16 11:11:10 -07:00
Caio Marcelo de Oliveira Filho
0ccfe741b1 spirv: Add more to_string helpers
Also, use a set to identify repeated values.  The previous arrangement
worked when the repetitions were one after another, but in some of the
new cases they are not.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
2019-04-16 11:11:10 -07:00
Jason Ekstrand
583a4d9a27 intel/mi_builder: Disable mem_mem tests on IVB
Tested-by: Clayton Craft <clayton.a.craft@intel.com>
2019-04-16 12:59:12 -05:00
Kenneth Graunke
33314cf410 iris: Change vendor and renderer strings
This patch changes the GL_VENDOR string from "Mesa Project" to "Intel".
This makes GLX_MESA_query_renderer report "Vendor: Intel (0x8086)"
instead of "Vendor: Mesa Project (0x8086)" which is arguably wrong.
We now also use a consistent vendor string across Windows and Linux.

It also prepends "Mesa" to the GL_RENDERER string, both to credit the
community and have a distinguishing mark between the two drivers.  We
drop "DRI" compared to i965, as it's not really that important.

Improves performance in Portal by 1.8x.  Iris is now 3.86% faster
than i965 at the portal-d1.dem timedemo on my Kabylake laptop.  One
change is that Portal selects the MapBufferRange path based on the
vendor string, and iris's BufferSubData path is still missing the
storage invalidation optimization.
2019-04-16 10:27:20 -07:00
Jason Ekstrand
56d9532316 intel/mi_builder: Re-order an initializer
The order doesn't matter in C99 but some C++ compilers seem to care.

Tested-by: Clayton Craft <clayton.a.craft@intel.com>
2019-04-16 12:07:15 -05:00
Jason Ekstrand
ba0f203ae8 nir/algebraic: Use a cache to avoid re-emitting structs
This takes the stupid simplest and most reliable approach to reducing
redundancy that I could come up with:  Just use the struct declaration
as the cach key.  This cuts the size of the generated C file to about
half and takes about 50 KiB off the .data section.

size before (release build):

   text	   data	    bss	    dec	    hex	filename
5363833	 336880	  13584	5714297	 573179	_install/lib64/libvulkan_intel.so

size after (release build):

   text	   data	    bss	    dec	    hex	filename
5229017	 285264	  13584	5527865	 545939	_install/lib64/libvulkan_intel.so

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-04-16 16:40:15 +00:00
Jason Ekstrand
0c712fd404 nir/algebraic: Move the template closer to the render function
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2019-04-16 16:40:15 +00:00
Kenneth Graunke
4c3c417b00 iris: Move iris_debug_recompile calls before uploading.
Order of operations is important, otherwise we'll find the program we
just uploaded as the "old" compile and get confused why nothing is
different between the two keys.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-16 09:01:20 -07:00
Kenneth Graunke
04f97eefa3 iris: Print the reason for shader recompiles.
I was lazy earlier and hadn't bothered typing / refactoring this.
Now I'm hitting some extra recompiles and would like to see why.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-16 09:01:18 -07:00
Kenneth Graunke
fad7801afd i965: Move program key debugging to the compiler.
The i965 driver has a bunch of code to compare two sets of program keys
and print out the differences.  This can be useful for debugging why a
shader needed to be recompiled on the fly due to non-orthogonal state
dependencies.  anv doesn't do recompiles, so we didn't need to share
this in the past - but I'd like to use it in iris.

This moves the bulk of the code to the compiler where it can be reused.
To make that possible, we need to decouple it from i965 - we can't get
at the brw program cache directly, nor use brw_context to print things.
Instead, we use compiler->shader_perf_log(), and simply pass in keys.

We put all of this debugging code in brw_debug_recompile.c, and only
export a single function, for simplicity.  I also tidied the code a
bit while moving it, now that it all lives in one file.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2019-04-16 09:01:15 -07:00
Marek Olšák
4f715868a9 winsys/amdgpu: don't set GTT with GDS & OA placements on APUs
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2019-04-16 10:24:19 -04:00
Marek Olšák
d3ce8a7f6b nir: optimize gl_SampleMaskIn to gl_HelperInvocation for radeonsi when possible
Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-04-16 10:24:19 -04:00
suresh guttula
d98f6380cb st/va/enc: Add support for frame_cropping_flag of VAEncSequenceParameterBufferH264
This patch will add support for frame_cropping when the input size is not
matched with aligned size. Currently vaapi driver ignores frame cropping
values provided by client. This change will update SPS nalu with proper
cropping values.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2019-04-16 10:15:09 -04:00
suresh guttula
05cc018ae6 radeon/vce:Add support for frame_cropping_flag of VAEncSequenceParameterBufferH264
This patch will add support for frame_cropping when the input size is not
matched with aligned size. Currently vaapi driver ignores frame cropping
values provided by client. This change will update SPS nalu with proper
cropping values.

v2: Moving default crop setting to else when enc_frame_cropping_flag is not set.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2019-04-16 10:15:09 -04:00
suresh guttula
8becf5b46d vl: Add cropping flags for H264
This patch adds cropping flags for H264 in pipe_h264_enc_pic_control.

Signed-off-by: Satyajit Sahu <satyajit.sahu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2019-04-16 10:15:09 -04:00
Tapani Pälli
624789e370 compiler/glsl: handle case where we have multiple users for types
Both Vulkan and OpenGL might be using glsl_types simultaneously or we
can also have multiple concurrent Vulkan instances using glsl_types.
Patch adds a one time init to track number of users and will release
types only when last user calls _glsl_type_singleton_decref().

This change fixes glsl_type memory leaks we have with anv driver.

v2: reuse hash_mutex, cleanup, apply fix also to radv driver and
    rename helper functions (Jason)

v3: move init, destroy to happen on GL context init and destroy

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-04-16 12:58:00 +03:00
Danylo Piliaiev
04508f57d1 intel/compiler: Do not reswizzle dst if instruction writes to flag register
If we write to the flag register changing the swizzle would change
what channels are written to the flag register.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110201
Fixes: 4cd1a0be
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: <ian.d.romanick@intel.com>
2019-04-16 09:42:08 +00:00
Samuel Pitoiset
ecbe6cb805 radv: sort the shader capabilities alphabetically
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-16 09:14:22 +02:00
Kenneth Graunke
024a57d23c iris: Make shader_perf_log print to stderr if INTEL_DEBUG=perf is set
This matches i965's behavior, and makes sure that shader compiler
messages are visible when setting INTEL_DEBUG=perf.
2019-04-15 23:33:03 -07:00
Samuel Pitoiset
8704bd5588 radv: enable shaderInt8 on SI and CIK
No CTS failures.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-16 08:22:54 +02:00
Chia-I Wu
c45c889f95 virgl: fix fence fd version check
Fixes: d1a1c21e76 ("virgl: native fence fd support")

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-15 23:25:47 +00:00
Chia-I Wu
442e75071b virgl: introduce virgl_drm_fence
virgl_drm_fence can wrap either a fence fd or a virgl_hw_res.  Because a
fence fd is cheaper than a virgl_hw_res, we use it whenever it is
available.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-15 23:25:47 +00:00
Chia-I Wu
334103efbf virgl: hide fence internals from the driver
Fence fds are cheaper than resources.  We want to let winsys make the
decision and use fence fds whenever they are supported.  This commit
prepares the work.

For the moment, we create a resource _and_ a fence fd when
supports_fences is true.  This will be fixed such that we create a
resource _or_ a fence fd.  (And because of a version check bug that we
will fix later, supports_fences is actually never true).

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-15 23:25:47 +00:00
Chia-I Wu
a23c091988 virgl: handle fence_server_sync in winsys
It does not need help from the driver.  This also fixes one issue where
the fence is ignored when the transfer queue is full.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2019-04-15 23:25:47 +00:00
Roland Scheidegger
88e0bbf24a gallivm: fix bogus assert in get_indirect_index
0 is a valid value as max index, and the code handles it fine. This isn't
commonly seen, as it will only happen with array declarations of size 1.
Fixes piglit tests/shaders/complex-loop-analysis-bug.shader_test

Fixes: a3c898dc97 "gallivm: fix improper clamping of vertex index when fetching gs inputs"
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110441

Reviewed-by: Brian Paul <brianp@vmware.com>
2019-04-16 00:49:38 +02:00
Andres Gomez
42351c21bb glsl/linker: always validate explicit locations for first and last interfaces
Until now, we were only doing this when linking a SSO
program. However, nothing avoids linking a non SSO program which
doesn't have both a VS and FS. In those cases, we also need to report
the usual linking errors, if happening.

v2: Use a better name for the renamed function (Timothy).

Signed-off-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-04-15 22:34:50 +00:00
Rhys Perry
6281517f3e vc4: fix build
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 5131b7a43f ('gallium: add support for formatted image loads')
2019-04-15 23:27:21 +01:00
Kenneth Graunke
0f3dc832bc iris: Fix FLUSH_EXPLICIT handling with staging buffers.
I neglected to blit the staging buffer back to the real one at
transfer_flush_region (FlushMappedBufferRange) time.
2019-04-15 14:51:01 -07:00
Kenneth Graunke
62b2ce0592 iris: Preserve all PIPE_TRANSFER flags in xfer->usage
We need to preserve PIPE_TRANSFER_FLUSH_EXPLICIT, DISCARD_RANGE, and
so on, but don't want to pass them to iris_bo_map().  So, keep them all,
but mask them off when calling map.

Chris Wilson told me to do this a long time ago and he was right.
2019-04-15 14:51:01 -07:00
Kenneth Graunke
9c52dce6a9 iris: Actually mark blorp_copy_buffer destinations as written. 2019-04-15 14:51:01 -07:00
grmat
8cb50edebf drirc: add Spectacle, Falkon to a-sync blacklist
Spectacle is the plasma screenshot utility

Falkon is a KDE web browser that should succeed Konqueror
2019-04-15 17:38:44 -04:00
davidbepo
10d33ddd50 drirc: add Waterfox to adaptive-sync blacklist 2019-04-15 17:27:15 -04:00
El Christianito
4d02f591cb drirc: add Budgie WM to adaptive-sync blacklist
Budgie Window Manager is an increasingly used alternative to GNOME and MATE.
Default in Solus OS, also used in other distros.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-04-15 17:27:15 -04:00
Dylan Baker
95aefc94a9 Delete autotools
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Acked-by: Matt Turner <mattst88@gmail.com>
2019-04-15 13:44:29 -07:00
Marek Olšák
de0c97c817 radeonsi: enable GL_EXT_shader_image_load_formatted
no changes - the driver doesn't use the format

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-15 16:18:07 -04:00
Rhys Perry
a35f2bbb85 st/mesa: add support for EXT_shader_image_load_formatted
v3: rebase

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-04-15 16:18:07 -04:00
Rhys Perry
082d180a22 mesa, glsl: add support for EXT_shader_image_load_formatted
v3: rebase

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-04-15 16:18:07 -04:00
Rhys Perry
5131b7a43f gallium: add support for formatted image loads
v3: rebase
v3: make use of u_pipe_screen_get_param_defaults

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2019-04-15 16:18:07 -04:00
Samuel Pitoiset
bf4a0485d9 radv: set ACCESS_NON_READABLE on stores for copy/fill/clear meta shaders
The compiler will emit GLC=1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-15 21:36:53 +02:00
Bas Nieuwenhuizen
f6fdd39eab radv: Use local buffers for the global bo list.
Even if we don't use local buffers in general. Turns out that even
though the performance is not the best the kernel still does it
better than our own list.

We still have to keep the radv bo list for buffers that are shared
externally.

This improves Talos on lowest quality setting (so as CPU bound as
possible) by ~10% if the global bo list is enabled.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-15 20:39:38 +02:00
Bas Nieuwenhuizen
af9534b9f3 ac: Move has_local_buffers disable to radeonsi.
In radv we had a separate flag to actually use it + an env option
to experimentally use it.

The common code setting has_local_buffers to false of course broke
that experimental option.

Also the "enable on APU" did not make sense for RADV as it is still
disabled by default.

Fixes: b21a4efb55 "radv/winsys: allow local BOs on APUs"
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-15 20:39:28 +02:00
Bas Nieuwenhuizen
a589d8c0ab radv: Add bolist RADV_PERFTEST flag.
To test global_bo_list performance.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-15 20:39:05 +02:00
Marek Olšák
dbab755ecf ac: fix incorrect bindless atomic code in visit_image_atomic
Coverity: CID 1444664

Fixes: d62d434fe9 ("ac/nir_to_llvm: add image bindless support")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2019-04-15 12:52:02 -04:00
Rhys Perry
8671cfe2a2 nir,ac/nir: fix cube_face_coord
Seems it was missing the "/ ma + 0.5" and the order was swapped.

Fixes: a1a2a8dfda ('nir: add AMD_gcn_shader extended instructions')
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-15 17:22:47 +01:00
Jason Ekstrand
90108deb27 anv: Update to use the new features struct names
These were updated in version 1.1.106 of vulkan.h to make more sense
with the extension names.  We may as well keep with the times.

Acked-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-04-15 13:25:43 +00:00
Jason Ekstrand
7f113c07b2 vulkan: Update the XML and headers to 1.1.106
Acked-by: Dave Airlie <airlied@redhat.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-04-15 13:25:43 +00:00
Timothy Arceri
8f74a60c43 nir: fix packing components with arrays
When gathering info for unmovable types we need to handle arrays.
While we dont support packing/moving arrays we do support packing
scalar components with these arrays.

Fixes piglit:
tests/spec/arb_enhanced_layouts/execution/component-layout/vs-fs-array-interleave-range.shader_test

Fixes: 5eb17506e1 ("nir: do not pack varying with different types")

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2019-04-15 19:25:12 +10:00
Samuel Pitoiset
14f03978ed radv: enable VK_KHR_shader_float16_int8
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2019-04-15 10:43:55 +02:00