Seamless cube map filtering requires setting the SEAMLESS_CUBE_MAP bit
in the texture descriptor's CONFIG1 field. Since this bit is controlled
by sampler state but stored in the texture descriptor, we need to handle
the mismatch between sampler state lifetime and descriptor immutability.
Create two texture descriptors per sampler view: one with seamless cube
map disabled and one enabled. At emission time, select the appropriate
descriptor based on the current sampler state's seamless_cube_map flag.
Passes all dEQP-GLES3.functional.texture.filtering.cube.* tests on GC7000.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35499>
Our existing descriptor implementation already supports
update-after-bind on both bifrost and valhall, but on bifrost the some
of the descriptor limits are lower than the minimum required by the
extension.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
Previously, our descriptor set limits were set based on the hardware
limits on bifrost. On valhall, the hardware descriptor table limits are
much higher. We need to advertise higher update-after-bind descriptor
limits for descriptor indexing, so might as well increase these also.
The 2^20 limit is the same as nvk and honeykrisp.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
We need to lower everything on bifrost, and everything except nonuniform
texture offsets on valhall. With texture offsets, the hardware supports
nonuniform offsets passed in a staging register, but does not support
passing nonuniform offsets as src1 in the narrow layout. We need to make
sure we check for this if we implement narrow offsetms later.
Input attachments are skipped in this commit because they need
additional changes.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
Runtime descriptor array doesn't require any changes, variable descriptor
count is already mostly supported and just needs handling for
maxVariableDescriptorCount.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
We already do this for push constants, just extend the existing
implementation. We need to update the push_consts sysval inside the
cmd_prepare_push_uniforms loop now because indirect draws patch the
sysvals. Previously this value was only used to read push constant FAUs,
so we didn't care.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
These don't require any changes for support.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
This simplifies get_physical_device_properties and allows us to use the
limits elsewhere.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
We were not able to use these previously because the headers require
PAN_ARCH.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
This makes things a little more flexible for groups of fields that are
arch-dependent, and allows us to use existing per-arch constant macros
instead of open-coding their values.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
The name of the struct that we're currently using is panvk_ssbo_addr.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
This is needed for the panvk_descriptor_state struct. All of the current
sites already included panvk_cmd_desc_state.h, so it wasn't a visible
issue.
Signed-off-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35408>
Now that nothing calls the driver create/destroy surface hooks
anymore, we can get rid of what's left from the code.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
Use pipe_surface to get the necessary information for the
various clears.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
Use pipe_surface to get the necessary information for the
various clears.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
So it can be reused from different places in the driver when
etna_surface is gone.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
If a render resource already exists, we know that a earlier check already
determined that the resource isn't compatible with the PE requirements, so
there is no point in checking again. Simply return the render resource if
it exists.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
As we want to get rid of the etna_surface, stop caching the (fast) clear
commands for the RS engine on the surface. As the pipe_surface is no
longer a CSO, we were regenerating those commands on each framebuffer
state change anyway, so the additional CPU overhead of doing this for
each clear shouldn't be too much worse.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
As another step in the direction of getting rid of etna_surface,
plug the offset calculation into all places that need it and drop
the precomputed offset from the surface struct.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
This check and especially the XXX in the comment hasn't been valid
for a long time, as our mipmap layout and render shadow code makes
sure that all levels are properly aligned for PE usage.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
Fill the reloc data when the framebuffer state is set. Now that
pipe_surface is no longer a CSO, it doesn't matter that we need
to pay the price for the computation at state set time instead
of surface_create time.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
Same as with the color buffer addresses, we don't need to track the
ZS buffer relocs in different members per GPU generation. Simply
emit the part that's relevant for the targeted GPU instance. Again
TS depth surface base is always the same address as the first depth
pipe address, so we can reuse the reloc.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
Currently we track the color buffer address information in multiple reloc
members in the compiled framebuffer state, depending on the GPU generation.
This wastes some space, as some of the relocs will never be used on any
specific GPU instance and it complicates the framebuffer state code.
Stop doing that in favor of a single PE_RT_PIPE_COLOR_ADDR reloc array to
track this information and simply fill and emit the relevant part of that
array. Additionally the TS color surface base is always equal to the first
pixel pipe color address, so we don't need to store this separately, but
can reuse the relocs from the color pipe setup.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
There are a lot of places scattered through the driver where we check
if the GPU has more than a single pixel pipe and whether the single
buffer feature is supported. All of them are trying to work out if we
need to use multitiling for the PE render targets. Add a screen spec
flag to store the result of both checks and use it where appropriate.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35406>
We already scalarize them but they might get vectorized again when
running the optimize loop before the intrinsics get turned into the
ir3-specific ones.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34311>
PresentWait2 should be possible on any physical device, as it adds a
surface capability query that depends on common wsi code.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35414>
Add common code for PresentWait2.
Unlike PresentWait, PresentWait2 is exposed by a surface capability.
On Wayland, PresentWait (and PresentWait2) require the presentation-time
extension to be available for a proper implementation, but not all
compositors support this. PresentWait would either have to be exposed
nowhere, or have weird/complicated fallback paths to try to enable it
on systems where presentation-time is unavailable.
Since PresentWait2 has a surface capability, we can simply not expose it
on Wayland when present-time is unavailable instead of always having to
have a less compliant fallback path.
PresentWait2 also explicitly forbids waiting on an ID that hasn't been
queued for presentation, so we don't need to handle that weird case.
Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35414>
This reverts commit 57ea689273.
This optimization is only sound when the operands of iadd are unsigned.
It turns out this is not always the case.
While the particular failure I was seeing was fixed by changing the
unsigned shifts to signed ones, I don't believe this is sound either. So
it's better to disable it for now until we find a better solution.
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Fixes: 57ea689273 ("ir3: optimize SSBO offset shifts for nir_opt_offsets")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34324>
Don't use the CCS_CC modifiers when fast clears are disabled
through INTEL_DEBUG=nofc. anv already behaves this way.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35417>
It seems this will try to link to LLVM because libvulkan_radeon links to
LLVM. Without the dep_llvm and with the GCC linker (instead of mold), this
will fail if you use a custom built LLVM and it can't find the shared object.
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35495>
This already landed upstream, I just forgot to update this file.
While we're at it, update the vk 1.2-entry to only list V10+, to match
reality.
Fixes: 8ec846407d ("panvk: expose vulkan 1.3 support")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35513>
vulkanMemoryModel was the last required feature we needed to expose
Vulkan 1.3, so let's enable it!
Reviewed-by: Caterina Shablia <caterina.shablia@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35502>
We have all the pieces lined up now, so let's enable the memory model
extension.
Reviewed-by: Caterina Shablia <caterina.shablia@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35502>
It seems like a good idea to optimize barriers, so let's do the same
thing as most other drivers do.
Reviewed-by: Caterina Shablia <caterina.shablia@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35502>
NONE-barriers also needs scheduling barriers, because otherwise we can
end up with memory loads and stores being reordered during scheduling.
Reviewed-by: Caterina Shablia <caterina.shablia@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35502>
The MEMORY_BARRIER instruction has some issues, where we end up
dead-code eliminating it before it gets to do what it's supposed to do.
But even if we fix that, we have issues where we can end up inserting
flow control into it, which isn't going to work because we have nothing
to emit here either.
So let's rework this to a special-cased NOP instruction, which is marked
as a scheduling barrier. The beneft here is that NOPs are already properly
handled when it comes to flow control.
Note that this isn't perfect either; this only prevents memory operations
from crossing the scheduling barrier. We should really prevent any
operation with observable side effects from crossing the barrier. This
includes things like reading clocks etc.
But that's a larger change, and it's a step in the right direction to get
this to no longer be dead-code eliminated. So let's put this band-aid on
for now.
Fixes: f77a50e45e ("pan/bi: add a MEMORY_BARRIER pseudo-instruction")
Reviewed-by: Caterina Shablia <caterina.shablia@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35502>
