Commit graph

161256 commits

Author SHA1 Message Date
Pedro J. Estébanez
6558a9e1fb nir2dxil: Lower texture projections
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19115>
2022-10-19 02:30:16 +00:00
Erik Faye-Lund
95fe418def mesa/st: remove translate_mode
This no longer does anything useful, so let's just drop it.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19034>
2022-10-19 01:33:23 +00:00
Erik Faye-Lund
a125f2d8c7 mesa/st: move static asserts out of translate_prim
Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19034>
2022-10-19 01:33:23 +00:00
Sil Vilerino
2d504bc5a0 CI: Add gallium-va and video-codecs in windows-vs2019 and debian-mingw32-x86_64
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19063>
2022-10-19 00:45:48 +00:00
Sil Vilerino
e08df85923 d3d12: resource_from_handle to validate importing resource ptr from same d3d12 device
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19063>
2022-10-19 00:45:48 +00:00
Sil Vilerino
b557ceb75b frontends/va: Add windows VA frontend support via vl_winsys_win32 and libva-win32
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19063>
2022-10-19 00:45:48 +00:00
Sil Vilerino
05f0d27601 gallium/vl: Add vl_winsys_win32 support
Acked-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19063>
2022-10-19 00:45:48 +00:00
Iván Briano
cde0778d3d hasvk: use DX rules for point rasterization
It seems that's what the reference renderer in the CTS expects for
Vulkan. This mostly matters if the edges of a point primitive fall
exactly on a pixel sampling point.

Fixes some upcoming tests under
dEQP-VK.pipeline.monolithic.depth.format.*.point_list*

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19026>
2022-10-19 00:20:48 +00:00
Iván Briano
63b2f735b1 anv: use DX rules for point rasterization
It seems that's what the reference renderer in the CTS expects for
Vulkan. This mostly matters if the edges of a point primitive fall
exactly on a pixel sampling point.

Fixes some upcoming tests under
dEQP-VK.pipeline.monolithic.depth.format.*.point_list*

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19026>
2022-10-19 00:20:48 +00:00
Iván Briano
d042669747 anv: compile_upload_rt_shader expects a valid pointer
Fixes crashes on almost every CTS test that uses raytracing pipelines.

Fixes: ff91c5ca42 ("anv: add analysis for push descriptor uses and store it in shader cache")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19130>
2022-10-18 23:55:48 +00:00
Yonggang Luo
095dfc6caa util: Move the implementation of futex_wake and futex_wait from futex.h to futex.c
Doing this is to avoid include bloat on Windows that pulls windows.h,
for other unix platforms, it's also benefit include the used symbols only when use
futex_wake and futex_wait.
No functional change, there is no performance incur because function call is consume
much less time than syscall

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19120>
2022-10-18 23:20:25 +00:00
Rob Clark
de34c2c29b freedreno: Fix fence unref race
Destroying a fence that was never flushed could race with the submit
queue, which could cause either an fd leak or closing an fd that the
retire queue would want to use.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19080>
2022-10-18 23:02:13 +00:00
Marek Olšák
a9341eb9da radeonsi: fix max_dw computation for CS preambles
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19131>
2022-10-18 22:42:28 +00:00
Marek Olšák
c62170fe57 winsys/amdgpu: fix (enable) preemption for chained IBs
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19131>
2022-10-18 22:42:28 +00:00
Marek Olšák
4c4d698208 radeonsi: rename si_create_multi_fence -> si_alloc_fence
We no longer have any multi fences (gfx+sdma fence).

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19131>
2022-10-18 22:42:28 +00:00
Eric Engestrom
2fd087cd19 v3dv: drop error overwrite
Let the error returned be bubbled up.

Fixes: dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic
Fixes: 591103d04d ("v3dv: don't return incompatible driver if GPU is not present")
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18901>
2022-10-18 22:22:58 +00:00
Alyssa Rosenzweig
3ea393e023 asahi: Lower point sprites in driver
mesa/st can't save us now!

Fixes: 310959d9fe ("mesa/st: rip out point-sprite cap")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18651>
2022-10-18 21:49:24 +00:00
Alyssa Rosenzweig
87bc306605 u_transfer_helper: Handle Z24S8 with z24_in_z32f but no interleaving
First, the separate Z/S condition kicks in, splitting up Z24S8 into
Z24X8 + S8. But then the driver is asked to create a Z24X8 resource,
which it may not be able to do. We need to further lower at create
time to Z32F + S8, so the driver is only asked to create supported
formats. We can do this with an extra condition at create time.

The alternate approach would be recursing into
transfer_helper_resource_create, but this seemed more obvious.

Fixes assertion failure running neverball on Asahi.

Assertion failed: (templ->format != PIPE_FORMAT_Z24X8_UNORM &&
      templ->format != PIPE_FORMAT_Z24_UNORM_S8_UINT &&
      "u_transfer_helper should have lowered"), function
agx_resource_create, file agx_pipe.c, line 174.

Fixes: 45a37ace28 ("u_transfer_helper: Handle Z24X8 for drivers that don't use the interleaved transfer_map")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18651>
2022-10-18 21:49:24 +00:00
Alyssa Rosenzweig
78adf44839 nir/lower_io: Set interpolated_input dest_type
...even for non-pixel interpolation, for consistency. Otherwise backends get
funny intrinsics with interpolateAt:

   vec4 32 ssa_4 = intrinsic load_interpolated_input (ssa_3, ssa_2) (base=1, component=0, dest_type=invalid /*0*/, io location=33 slots=1 /*161*/)

We know it'll be a float, but backends shouldn't need to special case this. (Or
maybe interpolated_input shouldn't have a dest_type index. I'd be ok with that
resolution too. But having one and not setting it consistently is wrong.)

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19085>
2022-10-18 21:08:54 +00:00
Alyssa Rosenzweig
0191b06756 mesa: Fix multiple matrix pops in a row
When we pop a matrix, we update stack->Top, which means that stack->Top has
changed since last push. We cannot skip subsequent pops or we'll get an
incorrect matrix.

Fixes Neverball rendering. When collecting a coin in game, the
point-sprite stars popping out of the coin are in the wrong places
due to an incorrect transformation matrix.

Close: #7502
Fixes: e6ecd22140 ("mesa: make glPopMatrix a no-op if the matrix hasn't changed")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19090>
2022-10-18 20:45:47 +00:00
Mark Collins
09ae2c4fee tu: Optimize hash_renderpass_instance by removing XXH64_update
It was determined through testing that `XXH64_update` is
significantly slower than calling `XXH64` directly as far as small
data velocity is concerned. This function is called on every RP end
which made it visible while profiling but substantial difference
(measured to be ~4x) made it not show up whatsoever.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18428>
2022-10-18 16:28:29 +00:00
Tapani Pälli
b02e9ef35a anv: fill AlphaToCoverageEnable lazily from state
Now the first blend state is filled only when emitted.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19105>
2022-10-18 10:44:57 +03:00
Tapani Pälli
9f75355643 anv: move emit_shading_rate to gfx8_cmd_buffer
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19105>
2022-10-18 10:44:38 +03:00
Yonggang Luo
83ebd637d5 d3d10ump: No need define snprintf anymore in InputAssembly.cpp
As minimal visual studio version are 2019

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18685>
2022-10-18 03:16:00 +00:00
Yonggang Luo
a9da108c6b nir: No need redefine snprintf anymore in nir.h
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18685>
2022-10-18 03:16:00 +00:00
Yonggang Luo
1ee21139e8 gallium: delete graw
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7017

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19099>
2022-10-18 01:57:27 +00:00
Timothy Arceri
ac7f4e0942 glsl/glsl_to_nir: remove unreachable code
This hack in glsl_to_nir() to clean up after the glsl ir linker should
no longer be reachable. These type of linking opts are now done via
a nir based linker long after GLSL IR has been coverted to nir by
this pass.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19104>
2022-10-18 00:05:29 +00:00
Sergei Chernyadyev
c7e9268658 radv: fix setting results for initialization failures in thread trace and trap handler
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19083>
2022-10-17 22:59:15 +00:00
nyanmisaka
0e782d9609 radeonsi: Inherit the old modifier when reallocating the texture.
Otherwise the reallocated texture has an invalid modifier when exporting
the VAAPI surface handle.

Signed-off-by: nyanmisaka <nst799610810@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19097>
2022-10-17 21:50:37 +00:00
Luis Felipe Strano Moraes
5bc52a9103 anv: fix FTBFS on grl due to changes in clang 15
This was causing build failures when RT is enabled on recent Fedora releases.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7404

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19094>
2022-10-17 21:27:19 +00:00
Alyssa Rosenzweig
2c7be4d421 nir: Usher nir_normalize_cubemap_coords into 2022
I stumbled upon this old NIR pass (still in use by intel and broadcom)
and noticed how most of the code was NIR boilerplate that we have
helpers for. Rewrite the pass to use all the helpers.

v2: Fix cube map arrays.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18754>
2022-10-17 20:46:24 +00:00
Alyssa Rosenzweig
fc5c671e87 nir: Fix nir_fmax_abs_vec_comp
This failed to take fabs of the first component, implementing an unintended
formula that would return the right results in some common cases but is wrong in
general:

   max { x, |y|, |z| }

instead of the intended

   max { |x|, |y|, |z| }

Reexpress the implementation to make correctness obvious.

Fixes: 272e927d0e ("nir/spirv: initial handling of OpenCL.std extension opcodes")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18754>
2022-10-17 20:46:24 +00:00
Sil Vilerino
6fbb87851c d3d12: HEVC Set D3D12_VIDEO_ENCODER_CODEC_CONFIGURATION_HEVC_FLAG_USE_ASYMETRIC_MOTION_PARTITION when required by caps
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19119>
2022-10-17 20:33:19 +00:00
Sil Vilerino
8f654b9000 d3d12: Fix HEVC wrong caps detection due to bad parenthesis in condition
Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19119>
2022-10-17 20:33:19 +00:00
Sil Vilerino
be7e2e5525 d3d12: HEVC Encode workaround for edge case in caps reporting not contemplated by upper layer interface
Workaround for https://github.com/intel/libva/issues/641

Example where VAConfigAttribValEncHEVCBlockSizes.max_transform_hierarchy_depth_intra/inter overflows

MinCbLog2SizeY = log2(8) = 3
CtbLog2SizeY = log2(64) = 6
MinTbLog2SizeY = log2(4) = 2
MaxTbLog2SizeY = log2(32) = 5

max_transform_hierarchy_depth_intra = (CtbLog2SizeY − MinTbLog2SizeY) = 4
max_transform_hierarchy_depth_inter = (CtbLog2SizeY − MinTbLog2SizeY) = 4

Reviewed-by: Giancarlo Devich <gdevich@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19119>
2022-10-17 20:33:19 +00:00
Danylo Piliaiev
3eed5931ed tu: Fix the size of patch control points state
tu6_emit_patch_control_points was called with CS size calculated
at compile time, but HS params have dynamic size. Account for this.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7479

Fixes: 68f3c38c80
("tu: Implement extendedDynamicState2PatchControlPoints")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19075>
2022-10-17 20:13:43 +00:00
Daniel Schürmann
ebf7f7a182 aco/spill: Fix spilling of Phi operands
By adding the renamed variable, phi operands got spilled twice at the precessors.

Fixes: dEQP-VK.ray_query.misc.dynamic_indexing
Closes: #7493
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19109>
2022-10-17 19:50:32 +00:00
Alyssa Rosenzweig
829f769e60 pan/mdg: Fix 16-bit alignment with spiller
The loop over sources has to happen for every instruction, regardless of whether
we also need to register allocate the destination. The other source loops handle
this properly, but this one was missed.

Fixes spilling failure in shaders/android/angle/aztec_ruins/16.shader_test when
the input NIR is shuffled a bit (from reordering passes).

Fixes: 129d390bd8 ("pan/mdg: Fix bound setting in RA for sources")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19093>
2022-10-17 19:11:10 +00:00
Alyssa Rosenzweig
2c446b6636 pan/mdg: Limit work registers for large workgroups
When more than 8 registers are used, Midgard can only fit 64 threads in a
thread group. For barriers to work properly, a threadgroup must fit an entire
work group. The GL driver configures the hardware to have threadgroups the size
of work groups. That means if more than 64 threads are used in a workgroup, and
more than 8 registers are used, the hardware will fault spawning threads.

To workaround this hardware limitation, we need to limit the number of work
registers used depending on the size of the workgroup. Typically, the work group
size is known at compile-time so that determination can usually be made without
variants. To avoid variants, we make a pessimistic estimate in the case when
it's not known at compile-time.

shader-db shows 6 shaders affected. I expect that all of these would fault with
DATA_INVALID_FAULT if they tried to execute before this patch, due to the
oversize local size, and faulting is even slower than spilling ;-)

Fixes dEQP-GLES31.functional.synchronization.* on Mali-T860.

instructions HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 121 -> 157 (29.75%)
instructions HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 121 -> 157 (29.75%)
instructions HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 141 -> 184 (30.50%)
instructions HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 141 -> 184 (30.50%)
instructions HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 513 -> 933 (81.87%)
instructions HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 505 -> 1002 (98.42%)

bundles HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 73 -> 116 (58.90%)
bundles HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 73 -> 116 (58.90%)
bundles HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 61 -> 97 (59.02%)
bundles HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 61 -> 97 (59.02%)
bundles HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 281 -> 701 (149.47%)
bundles HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 278 -> 775 (178.78%)

registers helped:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 11 -> 8 (-27.27%)
registers helped:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 11 -> 8 (-27.27%)
registers helped:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 14 -> 8 (-42.86%)
registers helped:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 14 -> 8 (-42.86%)
registers helped:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 16 -> 8 (-50.00%)
registers helped:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 16 -> 8 (-50.00%)

threads helped:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)
threads helped:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 1 -> 2 (100.00%)

spills HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 0 -> 5
spills HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 0 -> 5
spills HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 0 -> 8
spills HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 0 -> 8
spills HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 0 -> 112
spills HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 0 -> 146

fills HURT:   shaders/android/gfxbench/carchase/6.shader_test MESA_SHADER_COMPUTE: 0 -> 26
fills HURT:   shaders/android/gfxbench/carchase/386.shader_test MESA_SHADER_COMPUTE: 0 -> 26
fills HURT:   shaders/android/gfxbench/carchase/374.shader_test MESA_SHADER_COMPUTE: 0 -> 33
fills HURT:   shaders/android/gfxbench/carchase/4-1.shader_test MESA_SHADER_COMPUTE: 0 -> 33
fills HURT:   shaders/android/com.miHoYo.GenshinImpact/18.shader_test MESA_SHADER_COMPUTE: 0 -> 209
fills HURT:   shaders/android/com.miHoYo.GenshinImpact/16.shader_test MESA_SHADER_COMPUTE: 0 -> 234

total instructions in shared programs: 1521691 -> 1522766 (0.07%)
instructions in affected programs: 1542 -> 2617 (69.71%)
helped: 0
HURT: 6
HURT stats (abs)   min: 36.0 max: 497.0 x̄: 179.17 x̃: 43
HURT stats (rel)   min: 29.75% max: 98.42% x̄: 50.13% x̃: 30.50%
95% mean confidence interval for instructions value: -49.36 407.69
95% mean confidence interval for instructions %-change: 17.14% 83.12%
Inconclusive result (value mean confidence interval includes 0).

total bundles in shared programs: 649296 -> 650371 (0.17%)
bundles in affected programs: 827 -> 1902 (129.99%)
helped: 0
HURT: 6
HURT stats (abs)   min: 36.0 max: 497.0 x̄: 179.17 x̃: 43
HURT stats (rel)   min: 58.90% max: 178.78% x̄: 94.01% x̃: 59.02%
95% mean confidence interval for bundles value: -49.36 407.69
95% mean confidence interval for bundles %-change: 36.20% 151.83%
Inconclusive result (value mean confidence interval includes 0).

total registers in shared programs: 90681 -> 90647 (-0.04%)
registers in affected programs: 82 -> 48 (-41.46%)
helped: 6
HURT: 0
helped stats (abs) min: 3.0 max: 8.0 x̄: 5.67 x̃: 6
helped stats (rel) min: 27.27% max: 50.00% x̄: 40.04% x̃: 42.86%
95% mean confidence interval for registers value: -8.03 -3.30
95% mean confidence interval for registers %-change: -50.95% -29.13%
Registers are helped.

total threads in shared programs: 55717 -> 55723 (0.01%)
threads in affected programs: 6 -> 12 (100.00%)
helped: 6
HURT: 0
helped stats (abs) min: 1.0 max: 1.0 x̄: 1.00 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
95% mean confidence interval for threads value: 1.00 1.00
95% mean confidence interval for threads %-change: 100.00% 100.00%
Threads are helped.

total spills in shared programs: 1108 -> 1392 (25.63%)
spills in affected programs: 0 -> 284
helped: 0
HURT: 6

total fills in shared programs: 4721 -> 5282 (11.88%)
fills in affected programs: 0 -> 561
helped: 0
HURT: 6

Cc: mesa-stable
Closes: #7228
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
2022-10-17 18:56:13 +00:00
Alyssa Rosenzweig
9b19104a30 pan/mdg: Lower PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK on Midgard
The register file on Midgard is not large enough to sustain 256 threads in a
threadgroup when all ISA-defined registers are used. As such, we want
to advertise the smallest MAX_THREADS_PER_BLOCK permissible by the spec to
avoid compiling shaders that will necessarily spill. The minimum-maximum in
OpenGL ES 3.1 is 128, so set that on Midgard.

6 compute shaders LOST in shader-db due to exceeding this new limit. These
shaders would fault if they were attempted to be executed.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
2022-10-17 18:56:13 +00:00
Alyssa Rosenzweig
5c95be85ab panfrost/ci: Remove stale fail
Due to fractional run. This whole section passes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
2022-10-17 18:56:13 +00:00
Rohan Garg
16d061d3ac anv: Enable 16 bit float ops on devices that have a LSC
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17988>
2022-10-17 15:56:29 +02:00
Rohan Garg
43169dbbe5 intel/compiler: Support 16 bit float ops
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17988>
2022-10-17 15:56:28 +02:00
Daniel Stone
2e774180c6 Revert "panfrost/ci: Disable t720 jobs"
This reverts commit b3a69d1c31.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19113>
2022-10-17 12:13:47 +01:00
Alejandro Piñeiro
c1cb7506bb v3dv/pipeline: keep qpu_insts around if we expect them to be used later
If the pipeline was created with the creation flags
VK_PIPELINE_CREATE_CAPTURE_STATISTICS_BIT_KHR or
VK_PIPELINE_CREATE_CAPTURE_INTERNAL_REPRESENTATIONS_BIT_KHR it is
really likely that methods from VK_KHR_pipeline_executable_properties
that would require having access to the qpu insts around will be
called.

Instead of getting those back from the BO where we upload them, we
just keep them around. This could require more host memory, but would
allow us to avoid needing to handle map/unmap the BO when needed (so
needing the host memory in any case). This can be tricky if those
methods are being called from different threads (so we can avoid
adding a mutex there).

In the same way, if the pipeline was not created with those flags, we
skip collecting data that requires the QPU. Only
GetPipelineExecutableProperties is allowed to be called without any of
those flags, and doesn't require that info.

This fixes a race condition crash at GetPipelineExecutableProperties
when using fossilize-replay with some fossils with several shaders,
and using several threads, as some thread would be unmapping the bo
before other thread stopped to use it.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18859>
2022-10-17 10:06:23 +00:00
Timothy Arceri
7dcdd51938 glthread: leave dlist dispatch in place for Begin/End
If Begin/End are called from a display list make sure to leave
the dlist.c's dispatch table in place just like the non-glthread
code does.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7335
Fixes: 7f1cac7ba6 ("mesa/glthread: enable immediate mode")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19088>
2022-10-17 09:31:12 +00:00
Samuel Pitoiset
ca02da294a radv: discard the PS epilog when the pipeline doesn't use a fragment shader
This makes no sense and this was broken.

Fixes dEQP-VK.mesh_shader.ext.smoke.*_lib.mesh_shader_triangle_rasterization_disabled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19019>
2022-10-17 08:13:26 +02:00
Samuel Pitoiset
7b3aae8912 radv: do not create a noop FS when the FS is imported from a library
The entrypoint can be NULL even if the FS is imported from a library,
but we shouldn't overwrite the pre-compiled FS by a noop.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19019>
2022-10-17 08:13:24 +02:00
Jose Maria Casanova Crespo
c8849043a8 Revert "CI: Igalia farm is down"
This reverts commit aa405b789e.

Igalia farm is up again. Switch died and it needed to be replaced.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19102>
2022-10-17 02:02:01 +02:00
Timothy Arceri
675bcbb7a1 mesa: add EXT_debug_label support
KHR_debug provides the same functionality but this extension is
still in use and adding support for it seems fairly harmless.

For example its used by Unity and without it we keep
getting given apitraces from Unity games that just spew out
unsupported function errors due to the missing support.

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19029>
2022-10-17 08:53:20 +11:00