This is for future documentation/reference. It's likely radeonsi won't use
the atomic in compute shaders.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
This is only known to fix the assembly code when num_atomics > 6, which is
not currently used.
The VGPRs are reordered to simplify the clobber constraint.
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
Instead of exposing the original cached memory type index and silently
remapping to the first coherent, we could directly append the cached bit
to the first coherent if coherent-cached doesn't exist.
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30144>
maint7 provides the ability for virtualized drivers to pass along the
real driver's info, which allows for the enablement of per-driver workarounds
based on the underlying hardware
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964>
if the src for a replace_buffer call is mapped after replacement:
* avoid clearing access flags
* update valid range
the pointer access here is always safe because the only case in which
this scenario can occur is if tc is forced to sync immediately after
creating a replaceent buffer, and the replacement buffer's lifetime
will always be exceeded by the lifetime of the real buffer
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
when tc replaces a buffer in subdata, it may subsequently perform subdata calls
on the replacement if it is forced to sync during map, e.g.,
* bind_vbo(dst)
* draw
* subdata(src)
* buffer replacement
* map
* tc sync
* replace_buffer(dst, src)
* memcpy <- broken
* draw
in this scenario, src may not have data at the time of replacement,
but it will get data soon after, and this buffer range is the real one
cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
It is more or less just a code move, but I touched
is_only_used_by_iadd(..) to match the style of the other functions in
that file.
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30099>
This puts the legalize routine and the encoder right next to each other
in the code, making it much easier to verify that legalize() enforces
all of the constraints reqauired by encode().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
This pulls them out of the per-SM flow. They're also all no-ops to
legalize since they don't take vectors and are handled directly by RA.
This also means these instructions are now getting properly handled on
Maxwell where we previously trusted in the (probably broken) maxwell
legalizing code.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
This lets us stop passing liveness information into the per-op
legalization code. Long-term, I want to add a more general core
concept of destinations which are also reads but I haven't gotten
around to that yet.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
Instead of scattering number checks everywhere, this lets us actually
start splitting code paths. This commit just adds the shader model
trait. Later commits will add more methods.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
It's only needed for one Kepler+ check which is unlikely to ever be
relevant for NAK. Also, that should probably be based on the SPH
version or something, not an arbitrary shader model.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30141>
Handle '\n' when inside the MSGDESC start condition,
otherwise the lexer would apply its default rule (write
to stdout).
Without that, newlines were "leaking" to the output when
parsing a multiple line "MsgDesc". E.g. given the file
example.asm below
```
send(8) nullUD g126UD nullUD 0x02000000 0x00000000
thread_spawner MsgDesc: mlen 1 ex_mlen 0 rlen 0
{ align1 WE_all 1Q @1 EOT };
```
the assembler would produce one extra newline
```
$ brw_asm -t hex -g tgl example.asm
31 01 03 80 04 00 00 00 0c 7e 00 70 00 00 00 00
```
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30100>
