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Author SHA1 Message Date
Timur Kristóf
6106d4bce9 aco: Support GFX10 DS in aco_assembler. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-10 09:57:52 +02:00
Timur Kristóf
bbe87eb6c3 aco: Support GFX10 VINTRP in aco_assembler. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-10 09:57:52 +02:00
Timur Kristóf
b6235651b9 aco: Support GFX10 SMEM in aco_assembler. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-10 09:57:52 +02:00
Timur Kristóf
fd1d947457 aco: Add missing GFX10 specific fields and some README notes. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-10 09:57:52 +02:00
Timur Kristóf
a01d796de4 aco: Set +wavefrontsize64 for LLVM disassembler in GFX10 wave64 mode. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-10 09:57:52 +02:00
Alejandro Piñeiro
fa41a51891 v3d: take into account prim_counts_offset 
Specifically when reading the primitive counters.

This fixed ~700 CTS tests using this pattern:
dEQP-GLES3.functional.transform_feedback.*

when run after tests like
dEQP-GLES3.functional.prerequisite.read_pixels on the same
caselist. When run individually those tests were passing because
prim_counts_offset was zero.

Fixes: 0f2d1dfe65 ("v3d: use the GPU to
       record primitives written to transform feedback")

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
 2019-10-10 09:51:50 +02:00
Samuel Pitoiset
42b2d1119a radv: get the device name from radeon_info::name 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-10 08:15:41 +02:00
Dave Airlie
b1f3173d0f st/mesa: fix R8 bitmap texture for TGSI paths. 
The initial patch only fixed up the NIR path, but forgot
the TGSI path needed fixing as well.

Fixes: f92226931b ("st/mesa: Prefer R8 for bitmap textures")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2019-10-10 10:22:37 +10:00
Jason Ekstrand
c7e5d24d8f anv/pipeline: Capture serialized NIR 
This allows the serialized NIR to be displayed in RenderDoc and similar
tools.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
 2019-10-09 22:28:01 +00:00
Matt Turner
b2f6fda542 clover: Remove unused code 
Fixes: 96b592696f ("gallium: Require LLVM >= 3.9")
Bug: https://bugs.gentoo.org/685678
 2019-10-09 14:54:07 -07:00
Greg V
6da865bcfe clover: use iterator_range in get_kernel_nodes 
With libc++ (LLVM's STL implementation), the original code does not compile because an
appropriate vector constructor cannot be found (for the _ForwardIterator one, requirement
is_constructible is not satisfied).
 2019-10-09 14:54:07 -07:00
Marek Olšák
aed1f7ad34 radeonsi: enable MSAA shader images 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:38 -04:00
Marek Olšák
095a58204d radeonsi: expand FMASK before MSAA image stores are used 
Image stores don't use FMASK, so we have to turn it into identity.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:36 -04:00
Marek Olšák
98b88cc1f6 radeonsi: apply FMASK to MSAA image loads 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:34 -04:00
Marek Olšák
c0575a6241 radeonsi: clean up image_fetch_rsrc 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:33 -04:00
Marek Olšák
743a9d85e2 radeonsi: add FMASK slots for shader images (for MSAA images) 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:31 -04:00
Marek Olšák
1881b35bf6 radeonsi: set the sample index for shader images correctly 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:30 -04:00
Marek Olšák
0a0def7317 radeonsi: fix GLSL imageSamples() 
We haven't supported MSAA images, so it doesn't matter much.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:28 -04:00
Marek Olšák
279da8a201 tgsi/scan: add tgsi_shader_info::msaa_images_declared 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:27 -04:00
Marek Olšák
e26bd397a8 nir: add shader_info::last_msaa_image 
for radeonsi

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
 2019-10-09 17:12:19 -04:00
Marek Olšák
e4f4bb8abd radeonsi: don't set BO metadata for non-zero planes 
pointed out by Bas
 2019-10-09 17:06:54 -04:00
Marek Olšák
28da990bed radeonsi: ignore metadata for non-zero planes 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Marek Olšák
86e60bc265 radeonsi: remove si_vid_join_surfaces and use combined planar allocations 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Marek Olšák
0f7c9dad44 radeonsi: allocate planar multimedia formats in 1 buffer 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Marek Olšák
35680bfea1 vl: use u_format in vl_video_buffer_formats 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Marek Olšák
a122e70858 gallium/u_tests: test NV12 allocation and export 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Marek Olšák
20f132e5ef gallium/util: add planar format layouts and helpers 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Marek Olšák
3d06b9952c gallium/util: remove enum numbering from util_format_layout 
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2019-10-09 17:06:54 -04:00
Caio Marcelo de Oliveira Filho
9b58863f87 i965: Disable fast clears when running with INTEL_DEBUG=nofc 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
 2019-10-09 13:29:26 -07:00
Caio Marcelo de Oliveira Filho
bb9af8abbd iris: Disable fast clears when running with INTEL_DEBUG=nofc 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
 2019-10-09 13:29:26 -07:00
Caio Marcelo de Oliveira Filho
44978baece anv: Disable fast clears when running with INTEL_DEBUG=nofc 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
 2019-10-09 13:29:26 -07:00
Caio Marcelo de Oliveira Filho
d438261e05 intel: Add INTEL_DEBUG=nofc for disabling fast clears 
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
 2019-10-09 13:29:26 -07:00
Maya Rashish
e0d89b90d4 llvmpipe: avoid left-shifting a negative number. 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Maya Rashish <coypu@sdf.org>
 2019-10-09 20:20:40 +00:00
Danilo Spinella
962aca1910 egl: Include stddef.h in generated source 
Required for NULL macro used throughout the generated file.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
 2019-10-09 13:16:38 -07:00
OBATA Akio
1ee4258383 util: fix to detect NetBSD properly 
<sys/param.h> is required for NetBSD version detection,
and __NetBSD__ must be used to detect even on older releases.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
 2019-10-09 13:01:17 -07:00
Jan Beich
6ea0a918bb util: simplify BSD includes 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>
 2019-10-09 12:55:15 -07:00
Jan Beich
e892d9337f util: detect AltiVec at runtime on BSDs 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>
 2019-10-09 12:55:13 -07:00
Jan Beich
8d2dd1f4f3 util: skip AltiVec detection if built with -maltivec 
Helps platforms where runtime detection isn't implemented.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>
 2019-10-09 12:55:11 -07:00
Jan Beich
601a098338 util: detect NEON at runtime on FreeBSD 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>
 2019-10-09 12:55:10 -07:00
Jan Beich
7d5ad8e77e util: skip NEON detection if built with -mfpu=neon 
Helps platforms where runtime detection isn't implemented.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Jan Beich <jbeich@FreeBSD.org>
 2019-10-09 12:55:00 -07:00
Adam Jackson
5218c3b27e egl: Make native display detection work more than once 
eglGetDisplay is awful because you have to inspect the pointer you're
given and guess what type of native display it corresponds to. We make
it worse by caching the type of the first such display we detect, so if
the second call to eglGetDisplay is to a different display type, kaboom.

Fortunately this is a problem that can be solved with the delete key.

Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/156
 2019-10-09 18:12:29 +00:00
Rhys Perry
3f6e91a8d8 aco: enable nir_opt_sink 
SGPRS: 880272 -> 838936 (-4.70 %)
VGPRS: 705316 -> 680988 (-3.45 %)
Spilled SGPRs: 1032 -> 832 (-19.38 %)
Spilled VGPRs: 0 -> 0 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 252 -> 252 (0.00 %) dwords per thread
Code Size: 55150788 -> 55172436 (0.04 %) bytes
LDS: 451 -> 451 (0.00 %) blocks
Max Waves: 66178 -> 68706 (3.82 %)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-09 17:55:25 +00:00
Connor Abbott
5ac32b2954 nir/sink: Don't sink load_ubo to outside of its defining loop 
Previously, this could have made the resource divergent in code like
that which is genereated by nir_lower_non_uniform_access.

Fixes: da8ed68a ('nir: replace nir_move_load_const() with nir_opt_sink()')
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-09 17:55:25 +00:00
Connor Abbott
af9296b8c0 nir/sink: Rewrite loop handling logic 
Previously, for code like:
loop {
    loop {
        a = load_ubo()
    }
    use(a)
}
adjust_block_for_loops() would return the block before the first loop.
Now we compute the range of allowed blocks and then walk the dominance
tree directly, guaranteeing directly that we always choose a block that
dominates all the uses and is dominated by the definition.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-09 17:55:25 +00:00
Marek Olšák
b049ebcf90 amd: don't use AMD_FAMILY definitions from amdgpu_drm.h 
use the ones from addrlib

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-10-09 13:27:13 -04:00
Dylan Baker
770ab4db82 docs: update calendar, add news item, and link release notes for 19.2.1 2019-10-09 10:26:23 -07:00
Dylan Baker
4c302ba941 docs: Add SHA256 sum for 19.2.1 2019-10-09 10:26:23 -07:00
Dylan Baker
970a83ef34 docs: Add relnotes for 19.2.1 2019-10-09 10:26:23 -07:00
Rhys Perry
2ea9e59e8d aco: move s_andn2_b64 instructions out of the p_discard_if 
And use a new p_discard_early_exit instruction. This fixes some cases
where a definition having the same register as an operand causes issues.

v2: rename instruction to p_exit_early_if
v2: modify the existing instruction instead of creating a new one
v3: merge the "i == num - 1" IFs

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
 2019-10-09 16:19:02 +00:00
Daniel Schürmann
f584c42707 aco: don't reorder instructions in order to lower boolean phis 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
 2019-10-09 17:50:23 +02:00