Commit graph

1303 commits

Author SHA1 Message Date
Alyssa Rosenzweig
5dc0f5ccba asahi: implement VBO robustness
GL semantics. GLES (weaker) and VK (stronger) semantics are left as a todo, with
explanations given. Enabled always to deal with null VBOs, this should be
optimized once we have soft fault.

This necessitates a rework of VBO keys, but hopefully for the best.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616>
2024-02-14 21:02:29 +00:00
Alyssa Rosenzweig
4aadf67523 asahi: fix metadata for images with VS lowered to GS
KHR-GL46.shader_image_load_store.basic-allTargets-atomicVS

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616>
2024-02-14 21:02:28 +00:00
Alyssa Rosenzweig
9753cd44f7 asahi: Implement skeleton for tessellation
This implements a rough skeleton of what's needed for tessellation. It contains
the relevant lowerings to merge the VS and TCS, running them as a compute
kernel, and to lower the TES to a new VS (possibly merged in with a subsequent
GS). This is sufficient for both standalone tessellation and tess + geom/xfb
together. It does not yet contain a GPU accellerated tessellator, simply falling
back to the CPU for that for now. Nevertheless the data structures are
engineered with that end goal in mind, in particular to be able to tessellate
all patches in parallel without needing any prefix sums etc (using simple
watermark allocation for the heap).

Work on fleshing out the skeleton continues in parallel. For now, this does pass
the tests and lets the harder stuff get regression tested more easily. And
merging early will ease rebase.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616>
2024-02-14 21:02:28 +00:00
Alyssa Rosenzweig
5e8168f1b7 asahi: add more uapi stubs
for scratch

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27616>
2024-02-14 21:02:28 +00:00
Karol Herbst
f2b7c4ce29 nir: rework and fix rotate lowering
No driver supports urol/uror on all bit sizes. Intel gen11+ only for 16
and 32 bit, Nvidia GV100+ only for 32 bit. Etnaviv can support it on 8,
16 and 32 bit.

Also turn the `lower` into a `has` option as only two drivers actually
support `uror` and `urol` at this momemt.

Fixes crashes with CL integer_rotate on iris and nouveau since we emit
urol for `rotate`.

v2: always lower 64 bit

Fixes: fe0965afa6 ("spirv: Don't use libclc for rotate")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by (Intel and nir): Ian Romanick <ian.d.romanick@intel.com>

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27090>
2024-01-22 10:27:44 +00:00
Alyssa Rosenzweig
89de5e22ae asahi: don't use NIR_PASS_V
find . -type f -exec sed -ie 's/NIR_PASS_V(/NIR_PASS(_, /' \{} \;

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
375ad0ef26 asahi: don't use NIR_PASS for removing entrypoints
it's not a real nir pass, doesn't do metadata, etc.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
afefcc3b30 asahi: avoid silly internal NIR_PASS in gs lowering
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
c87d46b600 asahi: return progress from passes
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
8a6850d33c agx: return progress from passes
so we can be smarter about validation

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
26cedede0d agx: unset silly nir opts
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
01344819b0 agx: fix metadata in layer lowering
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
fe04e85be9 agx: only lower vars to ssa once
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
08fc7a4082 agx: stop lowering in opt loop
silly

total instructions in shared programs: 2278756 -> 2278751 (<.01%)
instructions in affected programs: 587 -> 582 (-0.85%)
helped: 2
HURT: 0

total bytes in shared programs: 15008934 -> 15008916 (<.01%)
bytes in affected programs: 3794 -> 3776 (-0.47%)
helped: 2
HURT: 0

total halfregs in shared programs: 519245 -> 519253 (<.01%)
halfregs in affected programs: 63 -> 71 (12.70%)
helped: 0
HURT: 1

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
9dfb072ae3 agx: ingest undefs in the backend
in prep for doing smarter things with them. stats changes seem to be RA
lottery, maybe?

total instructions in shared programs: 2277305 -> 2278756 (0.06%)
instructions in affected programs: 4003 -> 5454 (36.25%)
helped: 0
HURT: 9
Instructions are HURT.

total bytes in shared programs: 15000418 -> 15008934 (0.06%)
bytes in affected programs: 27072 -> 35588 (31.46%)
helped: 0
HURT: 9
Bytes are HURT.

total halfregs in shared programs: 519229 -> 519245 (<.01%)
halfregs in affected programs: 30 -> 46 (53.33%)
helped: 0
HURT: 2

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
b14987bf90 agx: rm deadcode
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
2024-01-12 01:13:03 +00:00
Yonggang Luo
c1d6d745cf asahi,panfrost: Use IS_POT_NONZERO to replace util_is_power_of_two_nonzero for different size
This member's size are not fixed, so use IS_POT_NONZERO over it

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26909>
2024-01-11 16:45:57 +00:00
Alyssa Rosenzweig
bec61b72b1 agx: clang-fmt
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
5948e7ec2e agx: unit test split uniform opt
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
355af1e903 agx: require min alignment for load/store vectorize
fixes test_basic vload_constant

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
96cd467559 agx: add unit test for pcopy lowering bug
hit by test_basic.local_kernel_scope

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
5b50040c51 agx: fix 64-bit phis with inlined immediates
test_basic  local_kernel_scope

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
1f0abffdaf agx: expand agx_index
cl kernels can be large.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
51f8bded0e agx: optimize split(64-bit uniform)
Trying to clean up CL.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
344ec42587 asahi: add missing tib alignment check
+ unit test replicating issue.

Fixes arb_sample_shading-builtin-gl-sample-mask-mrt-alpha-to-coverage

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
10d48979ce asahi: make txf robust properly
KHR-NoContext.gl43.robust_buffer_access_behavior.texel_fetch

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
27e3e88f18 asahi: rotate xfb'd tri strips
spec req.

GTF-GL46.gtf30.GL3Tests.transform_feedback.transform_feedback_geometry

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
f70da4e920 asahi: factor out libagx_map_vertex_in_tri_strip
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
9d78e40735 asahi: cl-ify some xfb logic
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
76e8a68249 asahi: link libagx before lowering mem access widths
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
c688db1fd7 asahi: add missing GS line strip (+adj) handling
How did this pass GLES CTS?!

GTF-GL46.gtf31.GL3Tests.primitive_restart.primitive_restart_mode

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
5eae46d9ea asahi: rm agx_vbufs wrapper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
9192d8367b asahi: rm vbuf.count from key
Unused and causing piles of shader variants in STK. Yikes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
97f9f7ab0a asahi: implement point sprites w/o shader key
we can replace varyings with point sprites, we just need to fix up .zw
appropriately. do that with some bcsels, ALU is cheap.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
ba0f28ad8b asahi: rm layered bit from shader key
Just always use layered, like AGXV. This was a pointless bit of optimization
that only affects render target spilling with neglible impact.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
a20c693b7f agx: fix xfb of invalid var
KHR-Single-GL44.enhanced_layouts.xfb_capture_struct

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
e0c1776187 agx: fix xfb of invalid comp
KHR-Single-GL44.enhanced_layouts.xfb_capture_inactive_output_component

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
4071baf1b3 agx: const fold after discard lowering
to avoid silly xor op with an unconditional discard.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
1006e27627 asahi: implement xfb overflow queries
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
33229d4ace agx: handle imm inlining into phis
allows better coalescing

total instructions in shared programs: 1881875 -> 1881745 (<.01%)
instructions in affected programs: 169787 -> 169657 (-0.08%)
helped: 288
HURT: 234
Instructions are helped.

total bytes in shared programs: 12332916 -> 12323788 (-0.07%)
bytes in affected programs: 1958846 -> 1949718 (-0.47%)
helped: 778
HURT: 108
Bytes are helped.

total halfregs in shared programs: 498490 -> 498126 (-0.07%)
halfregs in affected programs: 6960 -> 6596 (-5.23%)
helped: 102
HURT: 28
Halfregs are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
efeed6a6fc agx: prepare for immediates in phis
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
b7585851d0 agx: allow phis with 16bit imms
could do 32-bit too..

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
d8391860d9 agx: use mov imm for pcopies
allows bigger imms. no shaderdb changes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
6102c866d1 agx: use custom assert when packing
so it dumps out the context of what we're packing. much friendly for debug.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
b8c80c5e80 agx: mv agx_read/write_regs to validator
since agx_index::channels is now always correct.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
b7da198274 agx: trust in agx_index size
validated.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
75d911f0ee agx: add index size helper
to replace the switches.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
8e938d48f5 agx: rm outdated comment
no more logical ends

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
a65f17bfea agx: rm silly todo
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00
Alyssa Rosenzweig
7f1ec658e9 agx: validate post-RA
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
2024-01-10 08:44:38 -04:00