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asahi: rm agx_vbufs wrapper
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26963>
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commit
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4 changed files with 14 additions and 18 deletions
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@ -113,14 +113,14 @@ pass(struct nir_builder *b, nir_instr *instr, void *data)
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if (intr->intrinsic != nir_intrinsic_load_input)
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return false;
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struct agx_vbufs *vbufs = data;
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struct agx_attribute *attribs = data;
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b->cursor = nir_before_instr(instr);
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nir_src *offset_src = nir_get_io_offset_src(intr);
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assert(nir_src_is_const(*offset_src) && "no attribute indirects");
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unsigned index = nir_intrinsic_base(intr) + nir_src_as_uint(*offset_src);
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struct agx_attribute attrib = vbufs->attributes[index];
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struct agx_attribute attrib = attribs[index];
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uint32_t stride = attrib.stride;
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uint16_t offset = attrib.src_offset;
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@ -262,9 +262,9 @@ pass(struct nir_builder *b, nir_instr *instr, void *data)
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}
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bool
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agx_nir_lower_vbo(nir_shader *shader, struct agx_vbufs *vbufs)
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agx_nir_lower_vbo(nir_shader *shader, struct agx_attribute *attribs)
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{
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assert(shader->info.stage == MESA_SHADER_VERTEX);
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return nir_shader_instructions_pass(
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shader, pass, nir_metadata_block_index | nir_metadata_dominance, vbufs);
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shader, pass, nir_metadata_block_index | nir_metadata_dominance, attribs);
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}
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@ -31,11 +31,7 @@ struct agx_attribute {
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uint8_t format;
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};
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struct agx_vbufs {
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struct agx_attribute attributes[AGX_MAX_ATTRIBS];
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};
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bool agx_nir_lower_vbo(nir_shader *shader, struct agx_vbufs *vbufs);
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bool agx_nir_lower_vbo(nir_shader *shader, struct agx_attribute *attribs);
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bool agx_vbo_supports_format(enum pipe_format format);
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#ifdef __cplusplus
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@ -1787,7 +1787,7 @@ agx_compile_variant(struct agx_device *dev, struct pipe_context *pctx,
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if (nir->info.stage == MESA_SHADER_VERTEX) {
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struct asahi_vs_shader_key *key = &key_->vs;
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NIR_PASS_V(nir, agx_nir_lower_vbo, &key->vbuf);
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NIR_PASS_V(nir, agx_nir_lower_vbo, key->attribs);
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NIR_PASS_V(nir, agx_nir_lower_point_size, key->program_point_size);
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if (should_lower_clip_m1_1(dev, key->clip_halfz)) {
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@ -1810,7 +1810,7 @@ agx_compile_variant(struct agx_device *dev, struct pipe_context *pctx,
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nir_shader *vs = nir_deserialize(NULL, &agx_nir_options, &vs_reader);
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/* Apply the VS key to the VS before linking it in */
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NIR_PASS_V(vs, agx_nir_lower_vbo, &key->vbuf);
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NIR_PASS_V(vs, agx_nir_lower_vbo, key->attribs);
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NIR_PASS_V(vs, agx_nir_lower_ia, &key->ia);
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NIR_PASS_V(vs, nir_lower_io_to_scalar, nir_var_shader_out, NULL, NULL);
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@ -2105,7 +2105,7 @@ agx_create_shader_state(struct pipe_context *pctx,
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switch (so->type) {
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case PIPE_SHADER_VERTEX: {
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for (unsigned i = 0; i < AGX_MAX_VBUFS; ++i) {
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key.vs.vbuf.attributes[i] = (struct agx_attribute){
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key.vs.attribs[i] = (struct agx_attribute){
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.buf = i,
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.stride = 16,
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.format = PIPE_FORMAT_R32G32B32A32_FLOAT,
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@ -2267,8 +2267,8 @@ agx_update_vs(struct agx_context *ctx)
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ctx->stage[PIPE_SHADER_FRAGMENT].shader->info.inputs_linear_shaded,
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};
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memcpy(key.vbuf.attributes, ctx->attributes,
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sizeof(key.vbuf.attributes[0]) * AGX_MAX_ATTRIBS);
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memcpy(key.attribs, ctx->attributes,
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sizeof(key.attribs[0]) * AGX_MAX_ATTRIBS);
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return agx_update_shader(ctx, &ctx->vs, PIPE_SHADER_VERTEX,
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(union asahi_shader_key *)&key);
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@ -2325,8 +2325,8 @@ agx_update_gs(struct agx_context *ctx, const struct pipe_draw_info *info,
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.rasterizer_discard = ctx->rast->base.rasterizer_discard,
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};
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memcpy(key.vbuf.attributes, ctx->attributes,
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sizeof(key.vbuf.attributes[0]) * AGX_MAX_ATTRIBS);
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memcpy(key.attribs, ctx->attributes,
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sizeof(key.attribs[0]) * AGX_MAX_ATTRIBS);
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static_assert(sizeof(key.input_nir_sha1) ==
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sizeof(ctx->stage[PIPE_SHADER_VERTEX].shader->nir_sha1),
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@ -376,7 +376,7 @@ struct agx_blend {
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};
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struct asahi_vs_shader_key {
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struct agx_vbufs vbuf;
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struct agx_attribute attribs[AGX_MAX_VBUFS];
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bool clip_halfz;
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bool program_point_size;
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uint64_t outputs_flat_shaded;
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@ -402,7 +402,7 @@ struct asahi_gs_shader_key {
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struct agx_ia_key ia;
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/* Vertex shader key */
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struct agx_vbufs vbuf;
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struct agx_attribute attribs[AGX_MAX_VBUFS];
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/* If true, this GS is run only for its side effects (including XFB) */
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bool rasterizer_discard;
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