Commit graph

1220 commits

Author SHA1 Message Date
Samuel Pitoiset
5cb2eee557 tgsi: store the sampler view type directly in the instruction
RadeonSI needs to do a special lowering for Gather4 with integer
formats, but with bindless samplers we just can't access the index.

Instead, store the return type in the instruction like the target.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-18 21:48:16 +02:00
Marek Olšák
50189379fa gallium: add PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION
for skipping mapped-buffer checking in every GL draw call

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-17 20:28:44 +02:00
Marek Olšák
8559fa505d gallium: add flag PIPE_CONTEXT_PREFER_THREADED
State trackers can set this to tell the driver when u_threaded_context is
desirable.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Dieter Nützel <Dieter@nuetzel-hh.de>
2017-05-15 13:01:33 +02:00
Marek Olšák
70dcb7377d gallium: add PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
The next patch will use it. This is really for svga and GL2-level drivers.

Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-05-10 19:29:08 +02:00
Marek Olšák
330d0607ed gallium: remove pipe_index_buffer and set_index_buffer
pipe_draw_info::indexed is replaced with index_size. index_size == 0 means
non-indexed.

Instead of pipe_index_buffer::offset, pipe_draw_info::start is used.
For indexed indirect draws, pipe_draw_info::start is added to the indirect
start. This is the only case when "start" affects indirect draws.

pipe_draw_info::index is a union. Use either index::resource or
index::user depending on the value of pipe_draw_info::has_user_indices.

v2: fixes for nine, svga
2017-05-10 19:00:16 +02:00
Marek Olšák
22f6624ed3 gallium: separate indirect stuff from pipe_draw_info - 80 -> 56 bytes
For faster initialization of non-indirect draws.
2017-05-10 19:00:16 +02:00
Marek Olšák
c24c3b94ed gallium: decrease the size of pipe_vertex_buffer - 24 -> 16 bytes 2017-05-10 19:00:16 +02:00
Timothy Arceri
34c5e58a68 util: move ALWAYS_INLINE macro to util/macro.h
Also added clang check.

macro.h is include by p_compiler.h so no other change is needed.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-05-09 11:21:03 +10:00
Samuel Pitoiset
3a927e0aa3 gallium: add PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-26 19:15:34 +02:00
Nicolai Hähnle
17f24a9b75 gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-04-14 22:49:44 +02:00
Ilia Mirkin
08bd0aa507 tgsi: add SUBGROUP_* semantics
v2: add documentation (Nicolai)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05 15:29:41 +02:00
Ilia Mirkin
3650d7455f tgsi: add BALLOT/READ_* opcodes
v2 (Nicolai):
- BALLOT isn't per-channel
- expand the documentation (also for VOTE_*)

v3:
- only BALLOT returns a 64-bit lanemask (Boyan)
- relax the requirement on READ_INVOC: the invocation number to read
  from must be uniform within a sub-group. This matches the
  GL_ARB_shader_ballot spect (and the v_readlane instruction of AMD
  GCN)

v4:
- hopefully really fix the doc of VOTE_* returns (Ilia)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com> (v2)
2017-04-05 15:29:34 +02:00
Nicolai Hähnle
d3e6f6d7f7 gallium: add PIPE_CAP_TGSI_BALLOT
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05 15:29:31 +02:00
Nicolai Hähnle
d6e6fa01a5 gallium: add sparse buffer interface and capability
v2:
- explain the resource_commit interface in more detail

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-04-05 10:37:04 +02:00
Marek Olšák
7216e1d8af gallium: decrease the size of pipe_draw_info - 88 -> 80 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
295f4f56cb gallium: decrease the size of pipe_vertex_element - 16 -> 8 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
e6428092f5 gallium: decrease the size of pipe_resource - 64 -> 48 bytes
Some other changes needed here.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
3dfe61ed6e gallium: decrease the size of pipe_box - 24 -> 16 bytes
Also:

pipe_transfer: 48 -> 40 bytes.
pipe_blit_info = 176 -> 160 bytes.

v2: add a comment at pipe_box

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
9869a3b3ba gallium: decrease the size of pipe_sampler_view - 48 -> 32 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
4648bc2a8f gallium: decrease the size of pipe_surface - 48 -> 40 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
eb0fd0e5f8 gallium: decrease the size of pipe_framebuffer_state - 96 -> 80 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
19bc74f513 gallium: decrease the size of pipe_stream_output_info - 532 -> 268 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Marek Olšák
15ff2f7aa9 gallium: decrease the size of pipe_rasterizer_state - 36 -> 32 bytes
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-04-04 11:14:43 +02:00
Lyude
1cc7352c4c gallium: Add NV_fill_rectangle to pipe state
Signed-off-by: Lyude <lyude@redhat.com>

Changes since v1:
- Fix accidental widening of bitfields

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-03-31 21:41:29 -04:00
Lyude
ffe2bd676f gallium: Add a cap to check if the driver supports fill_rectangle
Changes since v1:
- Add pipe caps for etnaviv, freedreno, swr and virgl

Signed-off-by: Lyude <lyude@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2017-03-31 21:41:24 -04:00
Marek Olšák
150736b5c3 gallium: remove support for predicates from TGSI (v2)
Neved used.

v2: gallivm: rename "pred" -> "exec_mask"
    etnaviv: remove the cap
    gallium: fix tgsi_instruction::Padding

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-04-01 00:06:41 +02:00
Ilia Mirkin
94ec847cb0 tgsi: add CLOCK opcode
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-31 07:56:26 +02:00
Nicolai Hähnle
d0c7f924a3 gallium: add PIPE_CAP_TGSI CLOCK
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-31 07:56:25 +02:00
Marek Olšák
cca0389c72 gallium: add TGSI opcodes TEX_LZ and TXF_LZ
for better code generation in radeonsi
2017-03-15 18:17:41 +01:00
Marek Olšák
bf3cdf0fd3 gallium: add PIPE_CAP_TGSI_TEX_TXF_LZ 2017-03-15 18:17:41 +01:00
Christian König
62cff79378 gallium: add P016 format
Same layout as NV12, but 16bit per channel instead of 8.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Mark Thompson <sw@jkqxz.net>
2017-03-13 08:51:07 +01:00
Brian Paul
b0d3938430 gallium: s/uint/enum pipe_render_cond_flag/ for set_render_condition()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
2b9ab605aa gallium: s/uint/enum pipe_shader_type/ for set_constant_buffer()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
73bafb5ee3 gallium: s/unsigned/enum pipe_shader_type/ for get_compiler_options()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Brian Paul
637e5719b5 gallium: s/unsigned/enum pipe_shader_type/ for pipe_screen::get_shader_param()
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2017-03-08 08:50:20 -07:00
Marek Olšák
4a883966c1 gallium: remove PIPE_CAP_USER_INDEX_BUFFERS
all drivers support it

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>  (VMware driver only)
2017-02-25 00:03:09 +01:00
Timothy Arceri
4be98ed5fd gallium: add get_disk_shader_cache() callback
V2: Provide more detail in callback description and add description to
    screen.rst

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-23 09:20:22 +11:00
Marek Olšák
7ce8adad43 gallium: reorder fields in pipe_draw_info
sizeof(struct pipe_draw_info) = 104 -> 88

Also, vertices_per_patch is switched to ubyte, because it can't be more
than 32.

Seemed-reasonable-to: Roland Scheidegger
2017-02-22 20:36:40 +01:00
Marek Olšák
ad019bf5c6 gallium: remove TGSI_OPCODE_CLAMP
Not used and not widely supported. Use MIN+MAX instead.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-18 02:58:43 +01:00
Marek Olšák
d71bc0d741 gallium: add common uploaders into pipe_context (v2)
For lower memory usage and more efficient updates of the buffer residency
list. (e.g. if drivers keep seeing the same buffer for many consecutive
"add" calls, the calls can be turned into no-ops trivially)

v2: add const_uploader, add documentation

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Tested-by: Edmondo Tommasina <edmondo.tommasina@gmail.com>
Tested-by: Charmaine Lee <charmainel@vmware.com>
2017-02-14 21:46:16 +01:00
Ilia Mirkin
b090033087 gallium: add separate PIPE_CAP_INT64_DIVMOD
Nouveau does not currently have logic to implement this as a library
function. Even though such a library could be written, there's no big
advantage to do it that way for now given that int64 is a very uncommon
use-case. Allow a driver to expose INT64 without supporting division and
modulo operations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-09 12:57:21 -05:00
Nicolai Hähnle
a020cb3a72 gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capability
Make the cap consistent with PIPE_CAP_INT64.

Aside from the hypothetical case of using draw for vertex shaders (and
actually caring about doubles...), every implementation supports doubles
either nowhere or everywhere.

Also, st/mesa didn't even check the cap correctly in all supported
shader stages.

While at it, add a missing LLVM version check for 64-bit integers in
radeonsi. This is conservative: judging by the log, LLVM 3.8 might be
sufficient, but there are probably bugs that have been fixed since then.

v2: fix clover (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-02-02 16:53:42 +01:00
Boyuan Zhang
22841ec84a vl: add h264 constrained baseline profile
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2017-02-01 14:32:32 -05:00
Emil Velikov
e809fadb86 gallium: remove explicit __STDC_.*_MACROS defines
Analogous to previous commits.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-01-27 17:56:57 +00:00
Dave Airlie
f804506d4d gallium: Add integer 64 capability
v1.1: move to using a normal CAP. (Marek)

v2: fill in the cap everywhere

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-27 10:19:25 +01:00
Ilia Mirkin
6e40938fbc gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINS
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-23 20:36:47 -05:00
Ilia Mirkin
a2b2cd81d1 gallium: add TGSI_PROPERTY_MUL_ZERO_WINS
This will be useful for proper D3D9 emulation, where this behavior is
expected by some shaders.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-23 20:35:55 -05:00
Philipp Zabel
30853f55a3 gallium: add pipe_screen::resource_changed
Add a hook to tell drivers that an imported resource may have changed
and they need to update their internal derived resources.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2017-01-20 15:30:29 +01:00
Ilia Mirkin
a1c8484271 gallium: add flags parameter to texture barrier
This is so that we can differentiate between flushing any framebuffer
reading caches from regular sampler caches.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16 21:13:09 -05:00
Ilia Mirkin
ee3ebe68f9 gallium: add PIPE_CAP_TGSI_FS_FBFETCH
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16 21:13:09 -05:00