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gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capability

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Make the cap consistent with PIPE_CAP_INT64.

Aside from the hypothetical case of using draw for vertex shaders (and
actually caring about doubles...), every implementation supports doubles
either nowhere or everywhere.

Also, st/mesa didn't even check the cap correctly in all supported
shader stages.

While at it, add a missing LLVM version check for 64-bit integers in
radeonsi. This is conservative: judging by the log, LLVM 3.8 might be
sufficient, but there are probably bugs that have been fixed since then.

v2: fix clover (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Nicolai Hähnle 2017-01-27 10:35:13 +01:00
parent 96123dbad9
commit a020cb3a72
19 changed files with 30 additions and 33 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/auxiliary/gallivm/lp_bld_limits.h
View file

@ -133,8 +133,6 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;
case PIPE_SHADER_CAP_DOUBLES:
return 1;
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

1
src/gallium/auxiliary/tgsi/tgsi_exec.h
View file

@ -528,7 +528,6 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
return 1 << PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;

5
src/gallium/docs/source/screen.rst
View file

@ -373,6 +373,9 @@ The integer capabilities:
opcode to retrieve the current value in the framebuffer.
* ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
* ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
are supported.
* ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
.. _pipe_capf:
@ -451,8 +454,6 @@ to be 0.
program. It should be one of the ``pipe_shader_ir`` enum values.
* ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
* ``PIPE_SHADER_CAP_DOUBLES``: Whether double precision floating-point
operations are supported.
* ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
* ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and

2
src/gallium/drivers/etnaviv/etnaviv_screen.c
View file

@ -241,6 +241,7 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
@ -415,7 +416,6 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
return 4096;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

2
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -298,6 +298,7 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
@ -487,7 +488,6 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
/* a2xx compiler doesn't handle indirect: */
return is_ir3(screen) ? 1 : 0;
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

2
src/gallium/drivers/i915/i915_screen.c
View file

@ -161,7 +161,6 @@ i915_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_sha
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return I915_TEX_UNITS;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@ -299,6 +298,7 @@ i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;

1
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -267,6 +267,7 @@ llvmpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
return 1;
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 1;

3
src/gallium/drivers/nouveau/nv30/nv30_screen.c
View file

@ -208,6 +208,7 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
@ -299,7 +300,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@ -348,7 +348,6 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

2
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View file

@ -260,6 +260,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
@ -343,7 +344,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

3
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -243,6 +243,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
return 1;
case PIPE_CAP_COMPUTE:
return (class_3d < GP100_3D_CLASS);
@ -373,8 +374,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return 1;
case PIPE_SHADER_CAP_INTEGERS:
return 1;
case PIPE_SHADER_CAP_DOUBLES:
return 1;
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
return 1;
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

3
src/gallium/drivers/r300/r300_screen.c
View file

@ -230,6 +230,7 @@ static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
@ -339,7 +340,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@ -402,7 +402,6 @@ static int r300_get_shader_param(struct pipe_screen *pscreen, unsigned shader, e
case PIPE_SHADER_CAP_INTEGERS:
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

9
src/gallium/drivers/r600/r600_pipe.c
View file

@ -381,6 +381,14 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_INT64:
return 0;
case PIPE_CAP_DOUBLES:
if (rscreen->b.family == CHIP_ARUBA ||
rscreen->b.family == CHIP_CAYMAN ||
rscreen->b.family == CHIP_CYPRESS ||
rscreen->b.family == CHIP_HEMLOCK)
return 1;
return 0;
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
if (family >= CHIP_CEDAR)
return 30;
@ -555,7 +563,6 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
case PIPE_SHADER_CAP_DOUBLES:
if (rscreen->b.family == CHIP_ARUBA ||
rscreen->b.family == CHIP_CAYMAN ||
rscreen->b.family == CHIP_CYPRESS ||

11
src/gallium/drivers/radeonsi/si_pipe.c
View file

@ -414,9 +414,13 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_INT64:
return 1;
case PIPE_CAP_DOUBLES:
return HAVE_LLVM >= 0x0307;
case PIPE_CAP_INT64:
return HAVE_LLVM >= 0x0309;
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
@ -591,8 +595,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
return ir;
}
case PIPE_SHADER_CAP_DOUBLES:
return HAVE_LLVM >= 0x0307;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: {
uint64_t max_const_buffer_size;
@ -655,9 +657,6 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 1;
case PIPE_SHADER_CAP_DOUBLES:
return HAVE_LLVM >= 0x0307;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
/* TODO: Indirection of geometry shader input dimension is not
* handled yet

1
src/gallium/drivers/softpipe/sp_screen.c
View file

@ -165,6 +165,7 @@ softpipe_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 1;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:

4
src/gallium/drivers/svga/svga_screen.c
View file

@ -424,6 +424,7 @@ svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
}
@ -498,7 +499,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@ -561,7 +561,6 @@ vgpu9_get_shader_param(struct pipe_screen *screen, unsigned shader,
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
@ -657,7 +656,6 @@ vgpu10_get_shader_param(struct pipe_screen *screen, unsigned shader,
return PIPE_SHADER_IR_TGSI;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
return 0;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

2
src/gallium/drivers/vc4/vc4_screen.c
View file

@ -244,6 +244,7 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_DOUBLES:
case PIPE_CAP_INT64:
return 0;
@ -391,7 +392,6 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return 0;
case PIPE_SHADER_CAP_INTEGERS:
return 1;
case PIPE_SHADER_CAP_DOUBLES:
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:

2
src/gallium/include/pipe/p_defines.h
View file

@ -752,6 +752,7 @@ enum pipe_cap
PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY,
PIPE_CAP_TGSI_FS_FBFETCH,
PIPE_CAP_TGSI_MUL_ZERO_WINS,
PIPE_CAP_DOUBLES,
PIPE_CAP_INT64,
};
@ -813,7 +814,6 @@ enum pipe_shader_cap
PIPE_SHADER_CAP_PREFERRED_IR,
PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
PIPE_SHADER_CAP_DOUBLES,
PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */
PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED,
PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED,

3
src/gallium/state_trackers/clover/core/device.cpp
View file

@ -186,8 +186,7 @@ device::image_support() const {
bool
device::has_doubles() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_DOUBLES);
return pipe->get_param(pipe, PIPE_CAP_DOUBLES);
}
std::vector<size_t>

5
src/mesa/state_tracker/st_extensions.c
View file

@ -1160,10 +1160,7 @@ void st_init_extensions(struct pipe_screen *screen,
}
#endif
if (screen->get_shader_param(screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_DOUBLES) &&
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_DOUBLES)) {
if (screen->get_param(screen, PIPE_CAP_DOUBLES)) {
extensions->ARB_gpu_shader_fp64 = GL_TRUE;
extensions->ARB_vertex_attrib_64bit = GL_TRUE;
}