As float16_t may comes from arm_neon.h:
arm_neon.h:74:16: error: conflicting declaration 'typedef __fp16 float16_t'
74 | typedef __fp16 float16_t;
Also it is std::float16_t from <stdfloat> as part of C++23
So place it under namespace mesa to avoid conflict when upgrading xxhash.h to v0.8.3
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36654>
We did not count invocations when a shader discarded fragments.
Can just move this to before running the shader so the exec mask
still includes them.
Reviewed-by: Brian Paul <brian.paul@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36678>
When perfetto isn't enabled, atrace can still be used freely on Android.
All trace micros have accounted for that, but the init is missed.
Cc: mesa-stable
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36655>
This could cause importing buffers, in particular multiplanar YUV, since
when the offset of the plane is added, the aligned size could be beyond
the end of the buffer.
Fixes: 27b0f64b3e ("freedreno/a6xx: Use handle for explicit layout")
Signed-off-by: Rob Clark <rob.clark@oss.qualcomm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36656>
A bunch of fields are fixed and other depends on what stages are
bound.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
This instruction has a bunch of fixed fields and the rest depends on
the shader stages enabled. With the pipeline object going away, we
can't keep this on the pipeline.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
Using 3DSTATE_SBE_SWIZ for providing the implicit PrimitiveID value
(when not written by the previous stage) seems to be the legacy way of
doing things on Gfx7 and prior.
On Gfx8+ we got this new
3DSTATE_SBE::PrimitiveIDOverrideAttributeSelect to get the HW to write
the value wherever we want.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
The pipeline object going away, we won't have a place to keep this. We
can make the diff/emission efficient enough that it won't matter much.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
The vulkan runtime doesn´t store this parameter in the dynamic state
(since it's not a dynamic state). Just capture it at compile time and
leave on the wm_prog_data.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36665>
Convert pipe format to virgl format since virglrenderer will convert it
back from virgl format to pip format when create pipe_resource.
According to the call stack, only if vflags include flag:
PIPE_RESOURCE_FLAG_MAP_PERSISTENT or PIPE_RESOURCE_FLAG_MAP_COHERENT
will make it call into virgl_drm_winsys_resource_create_blob() so here
remove redundant if condition in virgl_drm_winsys_resource_create_blob().
Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36672>
Right now we're just printing 0 values
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 8966088cc5 ("anv: store gfx/compute bound shaders on command buffer state")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36663>
radeon_cmdbuf is too low level for stuff like tracked registers and
buffered registers on GFX11+.
This commit introduces radv_cmd_stream which is defined like:
struct radv_cmd_stream {
struct radeon_cmdbuf *b;
// TODO: add tracked regs
// TODO: add buffered regs
};
It will be much easier/cleaner to implement tracked/buffered registers
with this new structure.
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36314>
These * 32's got added when debugging this I guess and I never took them out.
Ouchie. Reduces memory footprint of tess by 32x. Geez.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36633>
