Part of fixing piglit EXT_framebuffer_multisample/sample-coverage inverted
(there is also a bug with RCL tiled blits)
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
There's no reason we couldn't do non-MSAA full resolution tile buffer
load/stores, but we would have claimed buffer overflow was being
attempted. Nothing does this currently.
This was a bug from the MSAA enabling. Tests for surfaces with
nr_samples==1 instead of 0 (generally GL renderbuffers) would incorrectly
fail out.
Fixes the ARB_framebuffer_sRGB piglit tests other than srgb_conformance.
Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
I had made the previous blit fix non-MSAA only because I was thinking
about how the hardware infers stride from the RENDERING_CONFIG packet.
However, I'm also inferring the stride for both MSAA src and dst in
vc4_render_cl.c from the width argument in the ioctl.
Fixes 15 EXT_framebuffer_multisample piglit tests.
On Broadwell, I get the following shader-db statistics:
Tessellation Control Shaders:
total instructions in shared programs: 57327 -> 57012 (-0.55%)
instructions in affected programs: 27334 -> 27019 (-1.15%)
helped: 45
HURT: 0
total cycles in shared programs: 265692 -> 255188 (-3.95%)
cycles in affected programs: 263122 -> 252618 (-3.99%)
helped: 184
HURT: 26
Tessellation Evaluation Shaders:
total instructions in shared programs: 23236 -> 23157 (-0.34%)
instructions in affected programs: 2791 -> 2712 (-2.83%)
helped: 27
HURT: 0
total cycles in shared programs: 151858 -> 149704 (-1.42%)
cycles in affected programs: 151858 -> 149704 (-1.42%)
helped: 101
HURT: 114
Geometry Shaders:
Orbital Explorer goes from 6442 -> 6356 instructions.
Two Shadow of Mordor shaders increase by a single instruction.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
NIR will lower it in nir_opt_algebraic.
No change in shader-db.
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
The timestamps are stored in a funny place, and even though they are a
64-bit result, are not stored with is64bit. Account for that when
retrieving the query result into a resource.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: "11.2" <mesa-stable@lists.freedesktop.org>
This lets us delete some redundant code and keep all of the
image_load_store format lowering logic in one place: libisl.
Reviewed-by: Chad Versace <chad.versace@intel.com>
Previously, we were relying on has_matching_typed_format returning true for
MESA_FORMAT_NONE which, in turn, relied on _mesa_get_format_bytes returning
1 for MESA_FORMAT_NONE. When we switch to ISL, this behaviour will no
longer be something we can rely on.
Reviewed-by: Chad Versace <chad.versace@intel.com>
We want to call this function from the shader compiler and having a full
isl_device available at that point isn't practical.
Reviewed-by: Chad Versace <chad.versace@intel.com>
C++ doesn't support designated initializers and g++ in particular doesn't
handle them when the struct gets complicated, i.e. has a union.
Reviewed-by: Chad Versace <chad.versace@intel.com>
To avoid build issues, ensure that you're running `make' at the top level
and/or you've executed `make clean' beforehand.
Reviewed-by: Chad Versace <chad.versace@intel.com>
They can only indicate out of memory conditions, since the other error
conditions are caught earlier.
v2: fix error message in EndQuery
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Even when begin_query succeeds, there can still be failures in query handling.
For example for radeon, additional buffers may have to be allocated when
queries span multiple command buffers.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Starting with Skylake, the display engine is capable of scanning out from
Y-tiled buffers. As such, we can and should use Y-tiling for better efficiency.
This also has the added benefit of being able to fast clear the winsys buffer.
Note that the buffer allocation done for mipmaps will already never allocate an
X-tiled buffer for GEN9.
This has an almost universal positive impact on benchmarks, some improving by as
much as 20%.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Use PIPE_SWIZZLE_* everywhere.
Use X/Y/Z/W/0/1 instead of RED, GREEN, BLUE, ALPHA, ZERO, ONE.
The new enum is called pipe_swizzle.
Acked-by: Jose Fonseca <jfonseca@vmware.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> (v1)
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
Acked-by: Jose Fonseca <jfonseca@vmware.com> (v1)
v2: name enums
and remove number assignments which are consecutive
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> (v1)
Reviewed-by: Roland Scheidegger <sroland@vmware.com> (v1)
Acked-by: Jose Fonseca <jfonseca@vmware.com> (v1)
v2: name enums
const buffers are no longer used since the clip plane const buffer was
moved to RW buffers
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
add it to the RW_BUFFERS descriptor array
now the slot masks don't have to have 64 bits
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
- use an enum
- use a unique slot number regardless of the shader stage
(the per-stage slots will go away for RW buffers)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
