Commit graph

65522 commits

Author SHA1 Message Date
Marek Olšák
3d05d86d88 radeonsi/gfx12: add DCC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
7232995fb5 radeonsi: remove leftover comment of non-existent RADEON_FLAG_MALL_NOALLOC
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
0dad61dfb6 radeonsi: allow RADEON_HEAP_BIT_GL2_BYPASS for VRAM
Queries might use it on gfx12.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
e303aae145 radeonsi: remove RADEON_FLAG_READ_ONLY
It's not used much and it doubles the number of heaps.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
21d6d44e96 radeonsi: remove cp_to_L2 and L2_to_cp, inline the values
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
c713fc7762 radeonsi: assume si_set_ring_buffer is only used by gfx6-10.3
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Marek Olšák
fbc237037c radeonsi/gfx12: fix GPU deadlocks due to query result incoherency
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29510>
2024-06-06 01:01:46 +00:00
Karol Herbst
fe5b0a4fe3 rusticl/kernel/launch: add helper to bind global buffers
At some point I want to create a builder, but that's what I want to do
later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
Karol Herbst
17a52774db rusticl/kernel/launch: get rid of Arc clones for global resources
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
Karol Herbst
5c1122728a rusticl/kernel/launch: rework how the printf buffer is allocated
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
Karol Herbst
25d1f84b57 rusticl/kernel/launch: move allocation of resources vec
This way its capacity is actually correct and skips a reallocation.

Also optimize it for the globals vec as well while at it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
Karol Herbst
bb2453c649 rusticl/kernel: move most of the code in launch inside the closure
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
Karol Herbst
436122cb10 rusticl/kernel/launch: remove useless upload of the input
It's already done right before each launch_grid call, no point in doing it
before the loop.

Fixes: 91552bb4ec ("rusticl: lower huge grids")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
Karol Herbst
d02dfe0f71 rusticl/kernel/launch: fix mapping usize types to GPU pointer sizes
I incorrectly assumed the API side defines how those values are sized, but
it's actually the GPU's pointer size. The API is simply reduced to 32 bit
ranges in 32 bit mode, but has to still pass in 64 bit values to the GPU.

Also use explicit types in a couple of places to prevent such mistakes in
the future.

Fixes: 204c287327 ("rusticl/kernel: properly handle grid and offsets being usize")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29527>
2024-06-05 23:11:26 +00:00
David Rosca
d1b794685f frontends/va: Send all bitstream buffers to driver at once
Usually applications will submit one buffer per slice. Instead of
sending it to driver in parts, send all submitted buffers at the
end of vlVaRenderPicture.
Avoids excessive reallocations in driver.

Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29131>
2024-06-05 18:12:02 +00:00
Alejandro Piñeiro
5eee101477 broadcom: move HW-dependant constants to v3d_device_info
Right now we have some HW-dependant constants that we are accessing
using the same mechanism that some hw-dependant functions, through a
macro (V3DV_X macro).

But this means that each time that we need to get those constant
values, we need to do a hw version check. Also, right now both the
macro and the defines with each HW value are duplicated on v3d and
v3dv. Also that macro is ugly and has a ugly name.

This commit moves those values to the already common v3d_device_info
structure.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29535>
2024-06-05 17:14:59 +00:00
Samuel Pitoiset
aa02cd2a1b ac,radeonsi: set COLOR_SW_MODE for mutable CB surfaces on GFX12
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29525>
2024-06-05 14:47:27 +00:00
Eric Engestrom
6889a0a5dd zink+nvk/ci: add flakes seen in latest nightly run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29548>
2024-06-05 11:31:08 +00:00
Karol Herbst
abb1518bfd rusticl/icd: make sure returned function pointers are of the right type
For extensions in the official CL headers this isn't all that important as
those are quite stable, but once we implement ext extensions it's better
to catch changes at compile time.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29526>
2024-06-04 20:32:02 +00:00
Faith Ekstrand
4db99332f3 lavapipe: Advertise VK_EXT_shader_replicated_composites
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
2024-06-04 16:34:48 +00:00
Rob Clark
46322630f1 gallium/tc: Allow replacement if replacing valid_range
If a buffer upload replaces the entire valid_buffer_range, we can
promote the update to DISCARD_WHOLE_RESOURCE.  This helps badly behaved
apps which constantly upload to the same offset (but are overwriting
the entire valid range each time).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507>
2024-06-04 14:49:56 +00:00
Rob Clark
27dd3807a8 freedreno: Use buffer replacement limit
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507>
2024-06-04 14:49:56 +00:00
Rob Clark
4c469b7cf0 gallium/tc: Add optional buffer replacement limit
Allow drivers to limit the amount of replacement buffers created, to
avoid runaway memory scenarios.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507>
2024-06-04 14:49:56 +00:00
Sergi Blanch Torne
dfabed2fc9 Uprev Piglit to cf8daaf5ba90fc9b8a0e144355026e2a14c79944
e180f96239...cf8daaf5ba

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29364>
2024-06-03 06:58:28 +00:00
Timothy Arceri
8112d44b94 lima: remove the standalone compiler
This is mostly a revert of cc78a42577 but we leave the meson tools
option as there is now a disassem tool.

This standalone compiler is unmaintained. The replacement is using
drm_shim which goes through the maintained/tested path.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29494>
2024-06-03 00:25:44 +00:00
Karol Herbst
bc149e0303 iris: fix PIPE_RESOURCE_PARAM_STRIDE for buffers
Iris calls iris_resource_get_param with PIPE_RESOURCE_PARAM_STRIDE
internally now when exporting memory objects. OpenCL's gl_sharing allows
to export buffers as well, which do not have strides.

This fixes the assert being hit there for buffers.

Fixes: 831703157e ("iris: Use resource_get_param in resource_get_handle")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29501>
2024-06-01 23:35:46 +00:00
Karol Herbst
6f713a764f rusticl/event: fix deadlock when calling clGetEventProfilingInfo inside callbacks
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11243
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29483>
2024-05-31 12:52:52 +00:00
Eric Engestrom
14ec84da17 zink+nvk/ci: add flakes seen in latest nightly run
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29500>
2024-05-31 12:34:30 +00:00
Jose Maria Casanova Crespo
f32a258503 v3d: really fix CLE MMU errors on 7.1HW Rpi5
Macro values that define values for different HW generations should
use the V3DV_X helper instead of being defined under a V3D_VERSION #if
condition.

Without this change, the original V3D_CLE_READAHEAD and
V3D_CLE_BUFFER_MIN_SIZE definitions used were only working for 4.2 HW.
For the 7.1 HW (RPi5) the 4.2 definitions were applied.

The CLE MMU errors were hidden as they were reported at dmesg as
"MMU error from client PTB (1) at 0x1884200, pte invalid" instead of
client CLE. So fixes all v3d dmesg warnings for PTB MMU errors on RPi5.

With this change we really don't need different functions per HW generation,
so we rename back file v3dx_cl.c to v3d_cl.c. As before, we can use
only the packets definitions for 4.2 HW as they use the same opcode as 7.1 HW.

Fixes: 11dce2ac81 ("v3d: fix CLE MMU errors avoiding using last bytes of CL BOs.")
Fixes: e2c624e74e ("v3d: Increase alignment to 16k on CL BO on RPi5")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29496>
2024-05-31 10:32:27 +00:00
Lionel Landwerlin
a1ea0956b4 intel: fix HW generated local-id with indirect compute walker
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 5e7f4ff97f ("intel: Add driver support for hardware generated local invocation IDs")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29473>
2024-05-31 08:44:22 +00:00
Timothy Arceri
ce43d7eb7f lima: drop unrequired opt from standalone compiler
In 0f0fa64eed do_mat_op_to_vec() was moved out of the linker and into
the compiler so there is no reason to call it again.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29470>
2024-05-31 00:24:03 +00:00
Ruijing Dong
c1e52baf30 radeonsi/vcn: enable roi feature for vcn5
Compared to vcn4, qp map unit is a 32bit number,
vcn5 uses 16bit integer number, in addition to
that it has 2 unit alignment requirement(32 bit
alignment) and each qp value needs left shift 7 bits.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
83d0189288 radeonsi/vcn: enable av1 encoding in vcn5
Have logic to handle tile allocation
according to vcn5's capability, if the
tile allocation is out of the limit, will
re-adjust the tile parameters.

re-construct frame header and obu instruction
logic. And add av1 encode params requried
for vcn5.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
6d90a1baa5 radeonsi/vcn: add header files for vcn5 av1 tile
Update header files for av1 tile and delta qp.
vcn5 needs driver and applcation to manage that
while in vcn4 they are managed in FW.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
5860d4348a frontends/va: parsing uniform_tile_spacing flag
in order to keep uniform_tile_spacing flag, parsing
it in frontends/va.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
250c89dd6d radeonsi/vcn: share functions between vcn4/vcn5
change some local functions to be shared.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
0712a5ef96 radeonsi/vcn: apply cdef mode to vcn5
When cdef_bits exist from external, use explicit mode,
otherwise, use default cdef mode.

Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Ruijing Dong
e20acd605e radeonsi/vcn: correct tile_size_bytes_minus1
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29423>
2024-05-30 20:12:37 +00:00
Sagar Ghuge
57307df766 iris: Load 32-bit MMIO PREDICATE register from buffer
We are writing 32-bit register value to buffer and were reading back
64-bit value back into two register. We don't need to read the second
register in this case.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29389>
2024-05-30 19:46:42 +00:00
Mike Blumenkrantz
2aaa6ebba1 build/amd: add amd-use-llvm build option
this allows amd drivers to disable llvm support while still allowing
llvmpipe/lavapipe to be built

by disabling llvm support in amd drivers, the load times for these drivers
decreases by 5-10ms

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28969>
2024-05-30 19:05:00 +00:00
Amit Pundir
38dfbae116 android: Fix zink build failure
Otherwise we run into following build error on Android:

    ld.lld: error: undefined symbol: galliumvk_driver_extensions

Fixes: cfa955ed78 ("glx/egl: fix LIBGL_KOPPER_DISABLE")
Signed-off-by: Amit Pundir <amit.pundir@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29475>
2024-05-30 18:16:59 +00:00
José Roberto de Souza
07855b0431 intel: Compute the optimal preferred SLM size per subslice
Up to now preferred SLM size was being set to maximum preferred SLM
size for GFX 12.5 platforms and to workgroup SLM size for Xe2 but
neither of those values are the optimal.
The optimal value is:
<number of workgroups that can run per subslice> * <workgroup SLM size>

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
José Roberto de Souza
ddda68bbf5 intel: Set preferred SLM allocation size >= than SLM size for Xe2
Xe2 has 2 requirements for preferred SLM size:
- this value needs to be >= then SLM size
- this value must be less than shared SLM/L1$ RAM in the sub-slice of platform

Also Xe2 don't have the special '0' encode that sets preferred SLM
allocation size to the maximum supported.
So here setting a value that is equal or larger than SLM size.

It was always setting SLM_ENCODES_128K for LNL A0 stepping probably
because of Wa_16018610683 but this restriction applies to all Xe2
platforms, also because of the first restriction mentioned here
this workaround is not being properly implemented, will fix that
in the next patch.

We should have a formula to calculate a preferred SLM allocation size
for gfx125 and Xe2 platfoms but until that this is enough to fix at
least the applications and tests below on LNL:
- GFXBench Aztec Ruins VK
- GravityMark VK
- Wildlife Extreme VK
- 5 crucible tests

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
José Roberto de Souza
f5f71bae02 intel: Move slm functions from brw_compiler.h to intel_compute_slm.c/h
This functions were inlined in a header and duplicated between brw and
elk.
That would be enough reasons to move to a C file but next patches
will add more code to support Xe2 platforms, what would cause more
code to be inlined, duplicating even more code and increasing lib
size.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28910>
2024-05-30 16:46:16 +00:00
Samuel Pitoiset
78b4d356f3 ac,radv,radeonsi: add ac_gpu_info::has_tc_compatible_htile
It's apparently not supported on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29417>
2024-05-30 11:05:03 +00:00
Karol Herbst
11e85c8ce0 gallium/drivers: do not link against libgalliumvl directly
libgalliumvl_stub was added so not all frontends have to link in full
video accleration support, shaving off around 100kB of binary size.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
2024-05-30 08:44:23 +00:00
Karol Herbst
b9ea6a3ab7 wgl: link against libgalliumvl_stub
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
2024-05-30 08:44:23 +00:00
Karol Herbst
691a22f015 rusticl: link against libgalliumvl_stub
Fixes compiling rusticl with certain configurations

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
2024-05-30 08:44:23 +00:00
Karol Herbst
b6f281bcb5 meson: centralize galliumvl_stub handling
This way frontends can simply link against the stub, but get the full
version if it's actually required (e.g. for radeonsi).

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
2024-05-30 08:44:23 +00:00
Karol Herbst
6c9c48a3ae gallium/vl: remove stubs which are defined in mesa_util
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26680>
2024-05-30 08:44:23 +00:00